A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS.
Francesco RadiceMelchiorre BruccoleriMarcello GanzerliGiorgio SpelgattiDavide SanzogniMassimo PozzoniAndrea MazzantiPublished in: ESSCIRC (2013)
Keyphrases
- analog to digital converter
- power consumption
- nm technology
- power supply
- hd video
- low power
- linear programming
- cmos technology
- high speed
- random access memory
- mixed signal
- image sensor
- stereo camera
- silicon on insulator
- high definition
- optimal solution
- linear program
- low cost
- single chip
- bit rate
- multi view
- dynamic programming
- np hard