Andrea Neviani

Publication Activity (10 Years)

Years Active: 1990-2022
Publications (10 Years): 12

Top Topics

Cmos Technology

Diagnostic Imaging

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE J. Solid State Circuits

Publications

Andrea Bettini, Thibault Cosnier, Alessandro Magnani, Olga Syshchyk, Matteo Borga, Stefaan Decoutere, Andrea Neviani
Analysis and Design of a Fully-Integrated Pulsed LiDAR Driver in 100V-GaN IC Technology. PRIME (2022)
Alberto Gatti, Giorgio Spiazzi, Andrea Gerosa, Andrea Neviani, Andrea Bevilacqua
A 130-nm CMOS Dual Input-Polarity DC-DC Converter for Low-Power Applications. ESSCIRC (2019)
Paolo Scaramuzza, Carlo Rubino, Michele Caruso, Marc Tiebout, Andrea Bevilacqua, Andrea Neviani
Class-J SiGe X-Band Power Amplifier Using a Ladder Filter-Based AM-PM Distortion Reduction Technique. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2018)
Fabio Boscolo, Fabio Padovan, Fabio Quadrelli, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua
A 21GHz 20.5%-tuning range Colpitts VCO with -119 dBc/Hz phase noise at 1MHz offset. ESSCIRC (2017)
Paolo Scaramuzza, Carlo Rubino, Marc Tiebout, Michele Caruso, M. Ortner, Andrea Neviani, Andrea Bevilacqua
Class-AB and class-J 22 dBm SiGe HBT PAs for X-band radar systems. ESSCIRC (2017)
Antonio Passamani, Davide Ponton, Edwin Thaller, Gerhard Knoblinger, Andrea Neviani, Andrea Bevilacqua
13.9 A 1.1V 28.6dBm fully integrated digital power amplifier for mobile and wireless applications in 28nm CMOS technology with 35% PAE. ISSCC (2017)
Fabio Padovan, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua
A 15.5-39GHz BiCMOS VGA with phase shift compensation for 5G mobile communication transceivers. ESSCIRC (2016)
Fabio Padovan, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua
A 12 GHz 22 dB-Gain-Control SiGe Bipolar VGA With 2° Phase-Shift Variation. IEEE J. Solid State Circuits 51 (7) (2016)
Stefano Brenna, Fabio Padovan, Andrea Neviani, Andrea Bevilacqua, Andrea Bonfanti, Andrea L. Lacaita
A 64-Channel 965-µW Neural Recording SoC With UWB Wireless Transmission in 130-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs (6) (2016)
Fabio Padovan, Marc Tiebout, Koen L. R. Mertens, Andrea Bevilacqua, Andrea Neviani
Design of Low-Noise K-Band SiGe Bipolar VCOs: Theory and Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2015)
Fabio Padovan, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua
A 12GHz 22dB-gain-control SiGe bipolar VGA with 2° phase shift variation. ESSCIRC (2015)
Michele Caruso, Matteo Bassi, Andrea Bevilacqua, Andrea Neviani
A 2-16 GHz 65 nm CMOS Stepped-Frequency Radar Transmitter With Harmonic Rejection for High-Resolution Medical Imaging Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2015)
Andrea Bevilacqua, Andrea Neviani
Energy-efficient ultra-wideband impulse radios for short-range low-data rate communications. ICECS (2014)
Fabio Padovan, Andrea Bevilacqua, Andrea Neviani
A 20Mb/s, 2.76 pJ/b UWB impulse radio TX with 11.7% efficiency in 130 nm CMOS. ESSCIRC (2014)
Matteo Bassi, Michele Caruso, Andrea Bevilacqua, Andrea Neviani
A 65-nm CMOS 1.75-15 GHz Stepped Frequency Radar Receiver for Early Diagnosis of Breast Cancer. IEEE J. Solid State Circuits 48 (7) (2013)
Michele Caruso, Matteo Bassi, Andrea Bevilacqua, Andrea Neviani
A 2-to-16GHz 204mW 3mm-resolution stepped-frequency radar for breast-cancer diagnostic imaging in 65nm CMOS. ISSCC (2013)
Michele Caruso, Matteo Bassi, Andrea Bevilacqua, Andrea Neviani
Wideband 2-16GHz local oscillator generation for short-range radar applications. ESSCIRC (2013)
Matteo Bassi, Michele Caruso, Andrea Bevilacqua, Andrea Neviani
A 1.75-15 GHz stepped frequency receiver for breast cancer imaging in 65 nm CMOS. ESSCIRC (2012)
Andrea Neviani, Andrea Bevilacqua, Andrea Gerosa, Daniele Vogrig
Low-power ultra-Wide-Band Impulse Radio transceivers for short range communications. ICICDT (2012)
Matteo Bassi, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
Integrated SFCW Transceivers for UWB Breast Cancer Imaging: Architectures and Circuit Constraints. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2012)
Fabio Padovan, Marc Tiebout, Koen L. R. Mertens, Andrea Bevilacqua, Andrea Neviani
A SiGe bipolar VCO for backhaul E-band communication systems. ESSCIRC (2012)
Silvia Soldà, Michele Caruso, Andrea Bevilacqua, Andrea Gerosa, Daniele Vogrig, Andrea Neviani
A 5 Mb/s UWB-IR Transceiver Front-End for Wireless Sensor Networks in 0.13 μm CMOS. IEEE J. Solid State Circuits 46 (7) (2011)
Matteo Bassi, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
Integrated transceivers for UWB breast cancer imaging: Architecture and circuit constraints. ISCAS (2011)
Silvia Soldà, Michele Caruso, Andrea Bevilacqua, Andrea Gerosa, Daniele Vogrig, Andrea Neviani
A 5Mb/s UWB-IR CMOS transceiver with a 186 pJ/b and 150 pJ/b TX/RX energy request. ESSCIRC (2010)
Silvia Soldà, Michele Caruso, Daniele Vogrig, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
Low-power UWB transmitter using a combined mixer and power amplifier. ISCAS (2010)
Andrea Gerosa, Silvia Soldà, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani
A digitally programmable ring oscillator in the UWB range. ISCAS (2010)
Matteo Camponeschi, Andrea Bevilacqua, Andrea Neviani, Pietro Andreani
Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end. ISCAS (2010)
Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Nicola Da Dalt, Andrea Gerosa, Andrea Neviani
11 mW Local Oscillator for the GSM Standard in 65 nm CMOS. IEEE J. Solid State Circuits 45 (7) (2010)
Stefano Dal Toso, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
A thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks. ISCAS (2010)
Andrea Bevilacqua, Leonardo Lorenzon, Nicola Da Dalt, Andrea Gerosa, Andrea Neviani
A 4.1 to 5.1 GHz 430 μA injection-locked frequency divider by 7 in 65 nm CMOS. ESSCIRC (2010)
Alessio Vallese, Andrea Bevilacqua, Christoph Sandner, Marc Tiebout, Andrea Gerosa, Andrea Neviani
Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems. IEEE J. Solid State Circuits 44 (2) (2009)
Andrea Gerosa, Silvia Soldà, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani
An Energy-Detector for Noncoherent Impulse-Radio UWB Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2009)
Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Nicola Da Dalt, Andrea Gerosa, Andrea Neviani
A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS. ESSCIRC (2009)
Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Stefano Marsili, Christoph Sandner, Andrea Gerosa, Andrea Neviani
UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking. ISSCC (2008)
Stefano Dal Toso, Andrea Bevilacqua, Marc Tiebout, Stefano Marsili, Christoph Sandner, Andrea Gerosa, Andrea Neviani
UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking. IEEE J. Solid State Circuits 43 (12) (2008)
Andrea Gerosa, Maurizio Dalla Costa, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani
An energy-detector for non-coherent impulse-radio UWB receivers. ISCAS (2008)
Silvia Soldà, Daniele Vogrig, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
Analog decoding of trellis coded modulation for multi-level flash memories. ISCAS (2008)
Andrea Bevilacqua, Matteo Camponeschi, Marc Tiebout, Andrea Gerosa, Andrea Neviani
Design of broadband inductorless LNAs in ultra-scaled CMOS technologies. ISCAS (2008)
Andrea Bevilacqua, Andrea Maniero, Andrea Gerosa, Andrea Neviani
An Integrated Solution for Suppressing WLAN Signals in UWB Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2007)
Andrea Gerosa, M. Soldan, Alessandro Bevilacqua, Andrea Neviani
A 0.18-µm CMOS Squarer Circuit for a Non-Coherent UWB Receiver. ISCAS (2007)
Andrea Bevilacqua, Alessio Vallese, Christoph Sandner, Marc Tiebout, Andrea Gerosa, Andrea Neviani
A 0.13μm CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers. ISSCC (2007)
Andrea Bevilacqua, Federico P. Pavan, Christoph Sandner, Andrea Gerosa, Andrea Neviani
Transformer-Based Dual-Mode Voltage-Controlled Oscillators. IEEE Trans. Circuits Syst. II Express Briefs (4) (2007)
Alessio Vallese, Andrea Bevilacqua, Christoph Sandner, Marc Tiebout, Andrea Gerosa, Andrea Neviani
An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 μm CMOS. ESSCIRC (2007)
Andrea Bevilacqua, Christoph Sandner, Andrea Gerosa, Andrea Neviani
Quadrature VCOs Based on Coupled PLLs. ISCAS (2007)
Andrea Maniero, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency. ICECS (2006)
Andrea Gerosa, Andrea Xotta, Andrea Bevilacqua, Andrea Neviani
An A/D Converter for Multimode Wireless Receivers, Based on the Cascade of a Double-Sampling Sigma Delta Modulator and a Flash Converter. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2006)
Alexandre Graell i Amat, Sergio Benedetto, Guido Montorsi, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code. IEEE Trans. Commun. 54 (6) (2006)
Andrea Bevilacqua, Andrea Maniero, Andrea Gerosa, Andrea Neviani
A 0.35 μm SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection. ICECS (2006)
Alexandre Graell i Amat, Daniele Vogrig, Sergio Benedetto, Guido Montorsi, Andrea Neviani, Andrea Gerosa
Reconfigurable Analog Decoder for a Serially Concatenated Convolutional Code. GLOBECOM (2006)
Alexandre Graell i Amat, Sergio Benedetto, Guido Montorsi, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code. IEEE Trans. Commun. 54 (11) (2006)
Andrea Gerosa, Andrea Bevilacqua, Andrea Neviani, Andrea Xotta
An optimal architecture for a multimode ADC, based on the cascade of a Sigma Delta modulator and a flash converter. ISCAS (2006)
Daniele Vogrig, Andrea Gerosa, Andrea Neviani, Alexandre Graell i Amat, Guido Montorsi, Sergio Benedetto
A 0.35-/spl mu/m CMOS analog turbo decoder for the 40-bit rate 1/3 UMTS channel code. IEEE J. Solid State Circuits 40 (3) (2005)
Alexandre Graell i Amat, Sergio Benedetto, Guido Montorsi, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
An analog turbo decoder for the rate-1/3, 40 bit, UMTS turbo code. ICC (2005)
Andrea Gerosa, Andrea Neviani
A 1.8-μW sigma-delta modulator for 8-bit digitization of cardiac signals in implantable pacemakers operating down to 1.8 V. IEEE Trans. Circuits Syst. II Express Briefs (2) (2005)
Andrea Xotta, Andrea Gerosa, Andrea Neviani
A multi-mode Sigma-Delta analog-to-digital converter for GSM, UMTS and WLAN. ISCAS (3) (2005)
Andrea Gerosa, Andrea Neviani
A low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filter. ISCAS (2) (2004)
Alexandre Graell i Amat, Guido Montorsi, Sergio Benedetto, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
An analog turbo decoder for the UMTS standard. ISIT (2004)
Andrea Gerosa, Andrea Maniero, Andrea Neviani
A fully integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers. IEEE J. Solid State Circuits 39 (7) (2004)
Andrea Gerosa, Andrea Maniero, Andrea Neviani
A fully integrated dual-channel log-domain programmable preamplifier and filter for an implantable cardiac pacemaker. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2004)
Matteo Perenzoni, Andrea Gerosa, Andrea Neviani
Analog CMOS implementation of Gallager's iterative decoding algorithm applied to a block turbo code. ISCAS (5) (2003)
Andrea Maniero, Andrea Gerosa, Andrea Neviani
Performance optimization in micro-power, low-voltage log-domain filters in pure CMOS technology. ISCAS (1) (2003)
Andrea Gerosa, Andrea Maniero, Andrea Neviani
A fully-integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers. ESSCIRC (2003)
Andrea Gerosa, Andrea Neviani
A very low-power 8-bit Sigma-Delta converter in a 0.8µm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V. ISCAS (5) (2003)
Alexandre Graell i Amat, Guido Montorsi, Andrea Neviani, Andrea Xotta
An analog decoder for concatenated magnetic recording schemes. ICC (2002)
Andrea Xotta, Daniele Vogrig, Andrea Gerosa, Andrea Neviani, Alexandre Graell i Amat, Guido Montorsi, Melchiorre Bruccoleri, G. Betti
An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels. ISCAS (5) (2002)
Stefano Zanella, Andrea Neviani, Enrico Zanoni, Paolo Miliozzi, Edoardo Charbon, Carlo Guardiani, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
Modeling of Substrate Noise Injected by Digital Libraries. ISQED (2001)
Andrea Gerosa, Arianna Novo, Andrea Mengalli, Andrea Neviani
A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker. ISCAS (1) (2001)
Andrea Gerosa, Andrea Neviani, Andrea Xotta, Gian Antonio Mian
A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization. ICECS (2001)
Andrea Gerosa, Arianna Novo, Andrea Neviani
Low-power sensing and digitization of cardiac signals based on sigma-delta conversion (poster session). ISLPED (2000)
Alessandra Nardi, Andrea Neviani, Carlo Guardiani
Realistic Worst-Case Modeling by Performance Level Principal Component Analysis. ISQED (2000)
G. M. Cortdazzo, E. Malavasi, Andrea Gerosa, Andrea Neviani, A. Basckirotto
A new structure for video-rate 2D SC FIR filters. EUSIPCO (1996)
Paolo Lugli, Andrea Neviani, Marco Saraniti
Physical models for heterostructure FET simulation. Eur. Trans. Telecommun. 1 (4) (1990)