Reconfigurable Analog Decoder for a Serially Concatenated Convolutional Code.
Alexandre Graell i AmatDaniele VogrigSergio BenedettoGuido MontorsiAndrea NevianiAndrea GerosaPublished in: GLOBECOM (2006)
Keyphrases
- reed solomon
- successive approximation
- error control
- source code
- low cost
- ldpc codes
- low complexity
- error detection
- error correction
- feature vectors
- reconfigurable architecture
- deep learning
- neural network
- network architecture
- floating gate
- circuit design
- low density parity check
- error concealment
- vlsi architecture
- digital circuits
- hardware implementation
- vector quantization
- signal processing
- general purpose
- learning algorithm