Mark A. Horowitz

Publication Activity (10 Years)

Years Active: 1983-2023
Publications (10 Years): 6

Top Topics

Efficient Inference

Top Venues

IEEE Trans. Image Process.

Publications

Jackson Melchert, Kathleen Feng, Caleb Donovick, Ross Daly, Ritvik Sharma, Clark W. Barrett, Mark A. Horowitz, Pat Hanrahan, Priyanka Raina
APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis. ASPLOS (3) (2023)
Olivia Hsu, Maxwell Strange, Ritvik Sharma, Jaeyeon Won, Kunle Olukotun, Joel S. Emer, Mark A. Horowitz, Fredrik Kjølstad
The Sparse Abstract Machine. ASPLOS (3) (2023)
Song Han, Xingyu Liu, Huizi Mao, Jing Pu, Ardavan Pedram, Mark A. Horowitz, William J. Dally
Retrospective: EIE: Efficient Inference Engine on Sparse and Compressed Neural Network. CoRR (2023)
Blaine Rister, Mark A. Horowitz, Daniel L. Rubin
Volumetric Image Registration From Invariant Keypoints. IEEE Trans. Image Process. 26 (10) (2017)
Song Han, Xingyu Liu, Huizi Mao, Jing Pu, Ardavan Pedram, Mark A. Horowitz, William J. Dally
EIE: Efficient Inference Engine on Compressed Deep Neural Network. CoRR (2016)
Song Han, Xingyu Liu, Huizi Mao, Jing Pu, Ardavan Pedram, Mark A. Horowitz, William J. Dally
EIE: Efficient Inference Engine on Compressed Deep Neural Network. ISCA (2016)
Wajahat Qadeer, Rehan Hameed, Ofer Shacham, Preethi Venkatesan, Christos Kozyrakis, Mark A. Horowitz
Convolution engine: balancing efficiency & flexibility in specialized computing. ISCA (2013)
ByongChan Lim, Jaeha Kim, Mark A. Horowitz
An efficient test vector generation for checking analog/mixed-signal functional models. DAC (2010)
Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2010)
Jaeha Kim, Jihong Ren, Mark A. Horowitz
Stochastic steady-state and AC analyses of mixed-signal systems. DAC (2009)
Jaeha Kim, Metha Jeeradit, ByongChan Lim, Mark A. Horowitz
Leveraging designer's intent: A path toward simpler analog CAD tools. CICC (2009)
Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
Variable domain transformation for linear PAC analysis of mixed-signal systems. ICCAD (2007)
Amir Amirkhany, Ali-Azam Abbasfar, Jafar Savoj, Mark A. Horowitz
Time-Variant Characterization and Compensation of Wideband Circuits. CICC (2007)
Jafar Savoj, Ali-Azam Abbasfar, Amir Amirkhany, Bruno W. Garlepp, Mark A. Horowitz
A new technique for characterization of digital-to-analog converters in high-speed systems. DATE (2007)
Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch. DAC (2007)
Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojanovic, Mark A. Horowitz
Practical Limits of Multi-Tone Signaling Over High-Speed Backplane Electrical Links. ICC (2007)
Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojanovic, Mark A. Horowitz
Analog Multi-Tone Signaling for High-Speed Backplane Electrical Links. GLOBECOM (2006)
Ken Mai, Ron Ho, Elad Alon, Dean Liu, Younggon Kim, Dinesh Patil, Mark A. Horowitz
Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-/spl mu/m CMOS. IEEE J. Solid State Circuits 40 (1) (2005)
Vladimir Stojanovic, Andrew Ho, Bruno W. Garlepp, Fred Chen, Jason Wei, Grace Tsang, Elad Alon, Ravi T. Kollipara, Carl W. Werner, Jared L. Zerbe, Mark A. Horowitz
Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery. IEEE J. Solid State Circuits 40 (4) (2005)
Patrick Chiang, William J. Dally, Ming-Ju Edward Lee, Ramesh Senthinathan, Yangjin Oh, Mark A. Horowitz
A 20-Gb/s 0.13-/spl mu/m CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer. IEEE J. Solid State Circuits 40 (4) (2005)
Elad Alon, Vladimir Stojanovic, Mark A. Horowitz
Circuits and techniques for high-resolution measurement of on-chip power supply noise. IEEE J. Solid State Circuits 40 (4) (2005)
Dejan Markovic, Vladimir Stojanovic, Borivoje Nikolic, Mark A. Horowitz, Robert W. Brodersen
Methods for true energy-performance optimization. IEEE J. Solid State Circuits 39 (8) (2004)
Vladimir Stojanovic, Amir Amirkhany, Mark A. Horowitz
Optimal linear precoding with theoretical and practical data rates in high-speed serial-link backplane communication. ICC (2004)
Amir Amirkhany, Vladimir Stojanovic, Mark A. Horowitz
Multi-tone signaling for high-speed backplane electrical links. GLOBECOM (2004)
Jared L. Zerbe, Carl W. Werner, Vladimir Stojanovic, Fred Chen, Jason Wei, Grace Tsang, Dennis Kim, William F. Stonecypher, Andrew Ho, Timothy P. Thrush, Ravi T. Kollipara, Mark A. Horowitz, Kevin S. Donnelly
Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell. IEEE J. Solid State Circuits 38 (12) (2003)
Frank O'Mahony, C. Patrick Yue, Mark A. Horowitz, S. Simon Wong
A 10-GHz global clock distribution using coupled standing-wave oscillators. IEEE J. Solid State Circuits 38 (11) (2003)
Jaeha Kim, Mark A. Horowitz, Gu-Yeon Wei
Design of CMOS adaptive-bandwidth PLL/DLLs: a general approach. IEEE Trans. Circuits Syst. II Express Briefs 50 (11) (2003)
Jacha Kim, Mark A. Horowitz
Adaptive supply serial links with sub-1-V operation and per-pin clock recovery. IEEE J. Solid State Circuits 37 (11) (2002)
Bendik Kleveland, Xiaoning Qi, Liam Madden, Takeshi Furusawa, Robert W. Dutton, Mark A. Horowitz, S. Simon Wong
High-frequency characterization of on-chip digital interconnects. IEEE J. Solid State Circuits 37 (6) (2002)
Jaeha Kim, Mark A. Horowitz
An efficient digital sliding controller for adaptive power-supply regulation. IEEE J. Solid State Circuits 37 (5) (2002)
Vladimir Marko Stojanovic, Georgios Ginis, Mark A. Horowitz
Transmit pre-emphasis for high-speed time-division-multiplexed serial-link transceiver. ICC (2002)
Bharadwaj S. Amrutur, Mark A. Horowitz
Fast low-power decoders for RAMs. IEEE J. Solid State Circuits 36 (10) (2001)
Chih-Kong Ken Yang, Vladimir Stojanovic, Siamak Modjtahedi, Mark A. Horowitz, William F. Ellersick
A serial-link transceiver based on 8-GSamples/s A/D and D/A converters in 0.25-μm CMOS. IEEE J. Solid State Circuits 36 (11) (2001)
Ron Ho, Kenneth Mai, Mark A. Horowitz
The future of wires. Proc. IEEE 89 (4) (2001)
Bharadwaj S. Amrutur, Mark A. Horowitz
Speed and power scaling of SRAM's. IEEE J. Solid State Circuits 35 (2) (2000)
Ramin Farjad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, Thomas H. Lee
A 0.3-μm CMOS 8-Gb/s 4-PAM serial link transceiver. IEEE J. Solid State Circuits 35 (5) (2000)
Evelina Yeung, Mark A. Horowitz
A 2.4 Gb/s/pin simultaneous bidirectional parallel link with per-pin skew compensation. IEEE J. Solid State Circuits 35 (11) (2000)
Gu-Yeon Wei, Jaeha Kim, Dean Liu, Stefanos Sidiropoulos, Mark A. Horowitz
A variable-frequency parallel I/O interface with adaptive power-supply regulation. IEEE J. Solid State Circuits 35 (11) (2000)
Bruno W. Garlepp, Kevin S. Donnelly, Jun Kim, Pak Shing Chau, Jared L. Zerbe, Charlie Huang, Chanh Tran, Clemenz L. Portmann, Donald Stark, Yiu-Fai Chan, Thomas H. Lee, Mark A. Horowitz
A portable digital DLL for high-speed CMOS interface circuits. IEEE J. Solid State Circuits 34 (5) (1999)
Ramin Farjad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, Thomas H. Lee
A 0.4-μm CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitter. IEEE J. Solid State Circuits 34 (5) (1999)
Bharadwaj S. Amrutur, Mark A. Horowitz
A replica technique for wordline and sense control in low-power SRAM's. IEEE J. Solid State Circuits 33 (8) (1998)
Arvin Shahani, Derek K. Shaeffer, Sunderarajan S. Mohan, Hirad Samavati, Hamid R. Rategh, Maria del Mar Hershenson, Min Xu, C. Patrick Yue, Daniel J. Eddleman, Mark A. Horowitz, Thomas H. Lee
Low-power dividerless frequency synthesis using aperture phase detection. IEEE J. Solid State Circuits 33 (12) (1998)
Kenneth W. Mai, Toshihiko Mori, Bharadwaj S. Amrutur, Ron Ho, Bennett Wilburn, Mark A. Horowitz, Isao Fukushi, Tetsuo Izawa, Shin Mitara
Low-power SRAM design using half-swing pulse-mode techniques. IEEE J. Solid State Circuits 33 (11) (1998)
Chih-Kong Ken Yang, Ramin Farjad-Rad, Mark A. Horowitz
A 0.5-μm CMOS 4.0-Gbit/s serial link transceiver with data recovery using oversampling. IEEE J. Solid State Circuits 33 (5) (1998)
Nobuaki Otsuka, Mark A. Horowitz
Circuit techniques for 1.5-V power supply flash memory. IEEE J. Solid State Circuits 32 (8) (1997)
Stefanos Sidiropoulos, Mark A. Horowitz
A semidigital dual delay-locked loop. IEEE J. Solid State Circuits 32 (11) (1997)
David L. Harris, Mark A. Horowitz
Skew-tolerant domino circuits. IEEE J. Solid State Circuits 32 (11) (1997)
Ricardo Gonzalez, Benjamin M. Gordon, Mark A. Horowitz
Supply and threshold voltage scaling for low power CMOS. IEEE J. Solid State Circuits 32 (8) (1997)
Mark A. Heinrich, David Ofelt, Mark A. Horowitz, John L. Hennessy
Hardware/software co-design of the Stanford FLASH multiprocessor. Proc. IEEE 85 (3) (1997)
Chih-Kong Ken Yang, Mark A. Horowitz
A 0.8-μm CMOS 2.5 Gb/s oversampling receiver and transmitter for serial links. IEEE J. Solid State Circuits 31 (12) (1996)
Ted E. Williams, Mark A. Horowitz
A 160 ns 54 bit CMOS division implementation using self-timing and symmetrically overlapped SRT stages. IEEE Symposium on Computer Arithmetic (1991)
Mark R. Santoro, Gary Bewick, Mark A. Horowitz
Rounding algorithms for IEEE multipliers. IEEE Symposium on Computer Arithmetic (1989)
Karen A. Huyser, Mark A. Horowitz
Generalization in digital functions. Neural Networks 1 (Supplement-1) (1988)
Jorge Rubinstein, Paul Penfield Jr., Mark A. Horowitz
Signal Delay in RC Tree Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2 (3) (1983)