Pak Shing Chau

Publication Activity (10 Years)

Years Active: 1996-2014
Publications (10 Years): 0

Top Topics

Concurrent Execution

Filtering Algorithm

Friendly Interface

Top Venues

IEEE J. Solid State Circuits

Publications

Masum Hossain, Farrukh Aquil, Pak Shing Chau, Brian Tsang, Phuong Le, Jason Wei, Teva Stone, Barry Daly, Chanh Tran, John C. Eble, Kurt Knorpp, Jared Zerbe
A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface. IEEE J. Solid State Circuits 49 (4) (2014)
Jared L. Zerbe, Pak Shing Chau, Carl W. Werner, Timothy P. Thrush, H. J. Liaw, Bruno W. Garlepp, Kevin S. Donnelly
1.6 Gb/s/pin 4-PAM signaling and circuits for a multidrop bus. IEEE J. Solid State Circuits 36 (5) (2001)
Bruno W. Garlepp, Kevin S. Donnelly, Jun Kim, Pak Shing Chau, Jared L. Zerbe, Charlie Huang, Chanh Tran, Clemenz L. Portmann, Donald Stark, Yiu-Fai Chan, Thomas H. Lee, Mark A. Horowitz
A portable digital DLL for high-speed CMOS interface circuits. IEEE J. Solid State Circuits 34 (5) (1999)
Kevin S. Donnelly, Yiu-Fai Chan, John Ho, Chanh Tran, Samir Patel, Benedict Lau, Jun Kim, Pak Shing Chau, Charlie Huang, Jason Wei, Leung Yu, Richard Tarver, Rakhee Kulkarni, Donald Stark, Mark Johnson
A 660 MB/s interface megacell portable circuit in 0.3 μm-0.7 μm CMOS ASIC. IEEE J. Solid State Circuits 31 (12) (1996)