John C. Eble

Publication Activity (10 Years)

Years Active: 1999-2015
Publications (10 Years): 1

Top Topics

Concurrent Execution

Cmos Technology

Top Venues

IEEE J. Solid State Circuits

Publications

Reza Navid, E.-Hung Chen, Masum Hossain, Brian S. Leibowitz, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology. IEEE J. Solid State Circuits 50 (4) (2015)
Masum Hossain, Farrukh Aquil, Pak Shing Chau, Brian Tsang, Phuong Le, Jason Wei, Teva Stone, Barry Daly, Chanh Tran, John C. Eble, Kurt Knorpp, Jared Zerbe
A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface. IEEE J. Solid State Circuits 49 (4) (2014)
Michael Bucher, Ravi T. Kollipara, Bruce Su, Liji Gopalakrishnan, Kashinath Prabhu, Pravin Kumar Venkatesan, Kambiz Kaviani, Barry Daly, William F. Stonecypher, Wayne D. Dettloff, Teva Stone, Fred Heaton, Yi Lu, Chris J. Madden, Sanath Bangalore, John C. Eble, Nhat Nguyen, Lei Luo
A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems. IEEE J. Solid State Circuits 49 (1) (2014)
E.-Hung Chen, Masum Hossain, Brian S. Leibowitz, Reza Navid, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
A 40-Gb/s serial link transceiver in 28-nm CMOS technology. VLSIC (2014)
Masum Hossain, E.-Hung Chen, Reza Navid, Brian S. Leibowitz, Chuen-Huei Adam Chou, Simon Li, Myeong-Jae Park, Jihong Ren, Barry Daly, Bruce Su, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering. VLSIC (2014)
Kambiz Kaviani, Michael Bucher, Bruce Su, Barry Daly, Bill Stonecypher, Wayne D. Dettloff, Teva Stone, Kashinath Prabhu, Pravin Kumar Venkatesan, Fred Heaton, Ravi T. Kollipara, Yi Lu, Chris J. Madden, John C. Eble, Lei Luo, Nhat Nguyen
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems. ISSCC (2013)
Masum Hossain, Kambiz Kaviani, Barry Daly, Makarand Shirasgaonkar, Wayne D. Dettloff, Teva Stone, Kashinath Prabhu, Brian Tsang, John C. Eble, Jared Zerbe
A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching. CICC (2012)
Dustin Dunwell, Anthony Chan Carusone, Jared Zerbe, Brian S. Leibowitz, Barry Daly, John C. Eble
A 2.3-4GHz injection-locked clock multiplier with 55.7% lock range and 10-ns power-on. CICC (2012)
Jared Zerbe, Barry Daly, Lei Luo, Bill Stonecypher, Wayne D. Dettloff, John C. Eble, Teva Stone, Jihong Ren, Brian S. Leibowitz, Michael Bucher, Patrick Satarzadeh, Qi Lin, Yue Lu, Ravi T. Kollipara
A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques. IEEE J. Solid State Circuits 46 (4) (2011)
John C. Eble, Scott Best, Brian S. Leibowitz, Lei Luo, Robert Palmer, John M. Wilson, Jared Zerbe, Amir Amirkhany, Nhat Nguyen
Power-efficient I/O design considerations for high-bandwidth applications. CICC (2011)
Wayne D. Dettloff, John C. Eble, Lei Luo, Pravin Kumar Venkatesan, Fred Heaton, Teva Stone, Barry Daly
A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI. ISSCC (2010)
Keith A. Bowman, Xinghai Tang, John C. Eble, James D. Menldl
Impact of extrinsic and intrinsic parameter fluctuations on CMOS circuit performance. IEEE J. Solid State Circuits 35 (8) (2000)
Keith A. Bowman, Blanca Austin, John C. Eble, Xinghai Tang, James D. Meindl
A physical alpha-power law MOSFET model. IEEE J. Solid State Circuits 34 (10) (1999)