E.-Hung Chen

Publication Activity (10 Years)

Years Active: 2008-2021
Publications (10 Years): 4

Top Topics

Cmos Technology

Gigabit Ethernet

Power Consumption

Top Venues

IEEE J. Solid State Circuits

Publications

Ramy Yousry, E.-Hung Chen, Yu-Ming Ying, Mohammed Abdullatif, Mohammad Elbadry, Ahmed ElShater, Tsz-Bin Liu, Joonyeong Lee, Dhinessh Ramachandran, Kaiz Wang, Chih-Hao Weng, Mau-Lin Wu, Tamer A. Ali
11.1 A 1.7pJ/b 112Gb/s XSR Transceiver for Intra-Package Communication in 7nm FinFET Technology. ISSCC (2021)
Tamer A. Ali, Mohammed Abdullatif, Henry Park, E.-Hung Chen, Ramy Awad, Miguel Gandara
56/112Gbps Wireline Transceivers for Next Generation Data Centers on 7nm FINFET CMOS Technology. CICC (2021)
Tamer A. Ali, E.-Hung Chen, Henry Park, Ramy Yousry, Yu-Ming Ying, Mohammed Abdullatif, Miguel Gandara, Chun-Cheng Liu, Po-Shuan Weng, Huan-Sheng Chen, Mohammad Elbadry, Qaiser Nehal, Kun-Hung Tsai, Kevin Tan, Yi-Chieh Huang, Chung-Hsien Tsai, Yuyun Chang, Yuan-Hao Tung
6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology. ISSCC (2020)
Tamer A. Ali, Ramy Yousry, Henry Park, E.-Hung Chen, Po-Shuan Weng, Yi-Chieh Huang, Chun-Cheng Liu, Chien-Hua Wu, Shih-Hao Huang, Chungshi Lin, Ke-Chung Wu, Kun-Hung Tsai, Kai-Wen Tan, Ahmed ElShater, Kuang-Ren Chen, Wei-Hao Tsai, Huan-Sheng Chen, Weiyu Leng, Mazen Soliman
A 180mW 56Gb/s DSP-Based Transceiver for High Density IOs in Data Center Switches in 7nm FinFET Technology. ISSCC (2019)
Reza Navid, E.-Hung Chen, Masum Hossain, Brian S. Leibowitz, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology. IEEE J. Solid State Circuits 50 (4) (2015)
E.-Hung Chen, Masum Hossain, Brian S. Leibowitz, Reza Navid, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
A 40-Gb/s serial link transceiver in 28-nm CMOS technology. VLSIC (2014)
Masum Hossain, E.-Hung Chen, Reza Navid, Brian S. Leibowitz, Chuen-Huei Adam Chou, Simon Li, Myeong-Jae Park, Jihong Ren, Barry Daly, Bruce Su, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble
A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering. VLSIC (2014)
Ramy Yousry, Henry Park, E.-Hung Chen, Chih-Kong Ken Yang
A digitally-calibrated 10GS/s reconfigurable flash ADC in 65-nm CMOS. ISCAS (2013)
Seuk Son, Hanseok Kim, Myeong-Jae Park, Kyung-Hoon Kim, E.-Hung Chen, Brian S. Leibowitz, Jaeha Kim
A 2.3-mW, 5-Gb/s Low-Power Decision-Feedback Equalizer Receiver Front-End and its Two-Step, Minimum Bit-Error-Rate Adaptation Algorithm. IEEE J. Solid State Circuits 48 (11) (2013)
Tamer A. Ali, Won Ho Park, Preeti Mulage, E.-Hung Chen, Ron Ho, Chih-Kong Ken Yang
A 100+ meter 12Gb/s/lane copper cable link based on clock-forwarding. VLSIC (2012)
E.-Hung Chen, Ramy Yousry, Chih-Kong Ken Yang
Power Optimized ADC-Based Serial Link Receiver. IEEE J. Solid State Circuits 47 (4) (2012)
Jaeha Kim, E.-Hung Chen, Jihong Ren, Brian S. Leibowitz, Patrick Satarzadeh, Jared Zerbe, Chih-Kong Ken Yang
Equalizer Design and Performance Trade-Offs in ADC-Based Serial Links. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2011)
E.-Hung Chen, Chih-Kong Ken Yang
ADC-Based Serial I/O Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2010)
Chih-Kong Ken Yang, E.-Hung Chen
ADC-based serial I/O receivers. CICC (2009)
E.-Hung Chen, Jihong Ren, Brian S. Leibowitz, Haechang Lee, Qi Lin, Kyung Suk Oh, Frank Lambrecht, Vladimir Stojanovic, Jared Zerbe, Chih-Kong Ken Yang
Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric. IEEE J. Solid State Circuits 43 (9) (2008)
Jackie Koon Lun Wong, E.-Hung Chen, Chih-Kong Ken Yang
Edge and Data Adaptive Equalization of Serial-Link Transceivers. IEEE J. Solid State Circuits 43 (9) (2008)