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A serial-link transceiver based on 8-GSamples/s A/D and D/A converters in 0.25-μm CMOS.
Chih-Kong Ken Yang
Vladimir Stojanovic
Siamak Modjtahedi
Mark A. Horowitz
William F. Ellersick
Published in:
IEEE J. Solid State Circuits (2001)
Keyphrases
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ultra low power
high speed
low power
low cost
power consumption
power supply
delay insensitive
real time
frequency response
analog vlsi
neural network
genetic algorithm
link structure
circuit design
rolling shutter