Chen Wang

Publication Activity (10 Years)

Years Active: 2001-2022
Publications (10 Years): 5

Top Topics

Data Compression

State Transition

Accurate Estimation

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Chong-Siao Ye, Shi-Xuan Zheng, Fong-Jyun Tsai, Chen Wang, Kuen-Jong Lee, Wu-Tung Cheng, Sudhakar M. Reddy, Justyna Zawada, Mark Kassab, Janusz Rajski
Efficient Test Compression Configuration Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (7) (2022)
Shi-Xuan Zheng, Chung-Yu Yeh, Kuen-Jong Lee, Chen Wang, Wu-Tung Cheng, Mark Kassab, Janusz Rajski, Sudhakar M. Reddy
Accurate Estimation of Test Pattern Counts for a Wide-Range of EDT Input/Output Channel Configurations. VTS (2022)
Yu Huang, Sylwester Milewski, Janusz Rajski, Jerzy Tyszer, Chen Wang
Low Cost Hypercompression of Test Data. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Yu Huang, Sylwester Milewski, Janusz Rajski, Jerzy Tyszer, Chen Wang
Hypercompression of Test Patterns. ITC (2018)
Grzegorz Mrugalski, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Chen Wang
Trimodal Scan-Based Test Paradigm. IEEE Trans. Very Large Scale Integr. Syst. 25 (3) (2017)
Grzegorz Mrugalski, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Chen Wang
TestExpress - New Time-Effective Scan-Based Deterministic Test Paradigm. ATS (2015)
Amit Kumar, Mark Kassab, Elham K. Moghaddam, Nilanjan Mukherjee, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer, Chen Wang
Isometric Test Data Compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (11) (2015)
Amit Kumar, Mark Kassab, Elham K. Moghaddam, Nilanjan Mukherjee, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer, Chen Wang
Isometric test compression with low toggling activity. ITC (2014)
Amit Kumar, Janusz Rajski, Sudhakar M. Reddy, Chen Wang
On the generation of compact test sets. ITC (2013)
Grzegorz Mrugalski, Janusz Rajski, Chen Wang, Artur Pogiel, Jerzy Tyszer
Isolation of Failing Scan Cells through Convolutional Test Response Compaction. J. Electron. Test. 23 (1) (2007)
Xijiang Lin, Kun-Han Tsai, Chen Wang, Mark Kassab, Janusz Rajski, Takeo Kobayashi, Randy Klingenberg, Yasuo Sato, Shuji Hamada, Takashi Aikyo
Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects. ATS (2006)
Huaxing Tang, Chen Wang, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer, Irith Pomeranz
On Efficient X-Handling Using a Selective Compaction Scheme to Achieve High Test Response Compaction Ratios. VLSI Design (2005)
Huaxing Tang, Gang Chen, Sudhakar M. Reddy, Chen Wang, Janusz Rajski, Irith Pomeranz
Defect Aware Test Patterns. DATE (2005)
Janusz Rajski, Jerzy Tyszer, Chen Wang, Sudhakar M. Reddy
Finite memory test response compactors for embedded test applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (4) (2005)
Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jerzy Tyszer, Chen Wang
Convolutional compaction-driven diagnosis of scan failures. ETS (2005)
Grzegorz Mrugalski, Chen Wang, Artur Pogiel, Jerzy Tyszer, Janusz Rajski
Fault Diagnosis in Designs with Convolutional Compactors. ITC (2004)
Janusz Rajski, Jerzy Tyszer, Chen Wang, Sudhakar M. Reddy
Convolutional Compaction of Test Responses. ITC (2003)
Chen Wang, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski, Jerzy Tyszer
On Compacting Test Response Data Containing Unknown Values. ICCAD (2003)
Chen Wang, Sudhakar M. Reddy, Irith Pomeranz, Xijiang Lin, Janusz Rajski
Conflict driven techniques for improving deterministic test pattern generation. ICCAD (2002)
Chen Wang, Irith Pomeranz, Sudhakar M. Reddy
REDI: An Efficient Fault Oriented Procedure to Identify Redundant Faults in Combinational Logic Circuits. ICCAD (2001)