Changhyun Kim

Publication Activity (10 Years)

Years Active: 1996-2024
Publications (10 Years): 17

Top Topics

Chest Radiographs

Memory Bandwidth

Genetic Networks

Digital X Ray Images

Top Venues

Publications

Changhyun Kim
Optimal Control for a Superconducting Hybrid MagLev Transport System with Multirate Multisensors in a Smart Factory. Sensors 24 (2) (2024)
Gregory Holste, Yiliang Zhou, Song Wang, Ajay Jaiswal, Mingquan Lin, Sherry Zhuge, Yuzhe Yang, Dongkyun Kim, Trong-Hieu Nguyen Mau, Minh-Triet Tran, Jaehyup Jeong, Wongi Park, Jongbin Ryu, Feng Hong, Arsh Verma, Yosuke Yamagishi, Changhyun Kim, Hyeryeong Seo, Myungjoo Kang, Leo Anthony Celi, Zhiyong Lu, Ronald M. Summers, George Shih, Zhangyang Wang, Yifan Peng
Towards long-tailed, multi-label disease classification from chest X-ray: Overview of the CXR-LT challenge. Medical Image Anal. 97 (2024)
Jun Hui Park, Jung Nam Kim, Seonhaeng Lee, Gang-Jun Kim, Namhyun Lee, Rock-Hyun Baek, Dae Hwan Kim, Changhyun Kim, Myounggon Kang, Yoon Kim
Current-Voltage Modeling of DRAM Cell Transistor Using Genetic Algorithm and Deep Learning. IEEE Access 12 (2024)
Changhyun Kim, Jinsoo Bae, Insung Baek, Jaeyoon Jeong, Young Jae Lee, Kiwoong Park, Sang Heun Shim, Seoung Bum Kim
DESEM: Depthwise Separable Convolution-Based Multimodal Deep Learning for In-Game Action Anticipation. IEEE Access 11 (2023)
Changhyun Kim, Giyeol Kim, Sooyoung Yang, Hyunsu Kim, Sangyool Lee, Hansu Cho
Chest X-Ray Feature Pyramid Sum Model with Diseased Area Data Augmentation Method. ICCV (Workshops) (2023)
Yongkee Kwon, Guhyun Kim, Nahsung Kim, Woojae Shin, Jongsoon Won, Hyunha Joo, Haerang Choi, Byeongju An, Gyeongcheol Shin, Dayeon Yun, Jeongbin Kim, Changhyun Kim, Ilkon Kim, Jaehan Park, Chanwook Park, Yosub Song, Byeongsu Yang, Hyeongdeok Lee, Seungyeong Park, Wonjun Lee, Seongju Lee, Kyuyoung Kim, Daehan Kwon, Chunseok Jeong, John Kim, Euicheol Lim, Junhyun Chun
Memory-Centric Computing with SK Hynix's Domain-Specific Memory. HCS (2023)
Gregory Holste, Yiliang Zhou, Song Wang, Ajay Jaiswal, Mingquan Lin, Sherry Zhuge, Yuzhe Yang, Dongkyun Kim, Trong-Hieu Nguyen Mau, Minh-Triet Tran, Jaehyup Jeong, Wongi Park, Jongbin Ryu, Feng Hong, Arsh Verma, Yosuke Yamagishi, Changhyun Kim, Hyeryeong Seo, Myungjoo Kang, Leo Anthony Celi, Zhiyong Lu, Ronald M. Summers, George Shih, Zhangyang Wang, Yifan Peng
Towards long-tailed, multi-label disease classification from chest X-ray: Overview of the CXR-LT challenge. CoRR (2023)
Changhyun Kim, Byoungho Lee
TORCWA: GPU-accelerated Fourier modal method and gradient-based optimization for metasurface design. Comput. Phys. Commun. 282 (2023)
Changhyun Kim, Sangjae Lee, Kwang-Seok Lee
Tremor Feature Extraction for Enhanced Interpretability of Vocal Disease Classification. ICPR Workshops (2) (2022)
Yeonggeun Song, Han-Gon Ko, Changhyun Kim, Deog-Kyoon Jeong
A 1.05-to-3.2 GHz All-Digital PLL for DDR5 Registering Clock Driver With a Self-Biased Supply-Noise-Compensating Ring DCO. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Sun-Je Kim, Changhyun Kim, Youngjin Kim, Jinsoo Jeong, Seokho Choi, Woojun Han, Jaisoon Kim, Byoungho Lee
Dielectric Metalens: Properties and Three-Dimensional Imaging Applications. Sensors 21 (13) (2021)
Dongkyun Kim, Kibong Koo, Yongmi Kim, Dong-Uk Lee, Jaejin Lee, Ki Hun Kwon, Byeongchan Choi, Hongjung Kim, Sanghyun Ku, Jong-Sam Kim, Seungwook Oh, Minsu Park, Dain Im, Yongsung Lee, Mingyu Park, Jonghyuck Choi, Junhyun Chun, Kyowon Jin, Sungchun Jang, Jun-Yong Song, Hankyu Chi, Geunho Choi, Sunmyung Choi, Changhyun Kim, Minsik Han
A 1.1-V 10-nm Class 6.4-Gb/s/Pin 16-Gb DDR5 SDRAM With a Phase Rotator-ILO DLL, High-Speed SerDes, and DFE/FFE Equalization Scheme for Rx/Tx. IEEE J. Solid State Circuits 55 (1) (2020)
Seokwoo Choi, Taejoo Chang, Changhyun Kim, Yongsu Park
x64Unpack: Hybrid Emulation Unpacker for 64-bit Windows Environments and Detailed Analysis Results on VMProtect 3.4. IEEE Access 8 (2020)
Dongkyun Kim, Minsu Park, Sungchun Jang, Jun-Yong Song, Hankyu Chi, Geunho Choi, Sunmyung Choi, Jaeil Kim, Changhyun Kim, Kyung Whan Kim, Kibong Koo, Seonghwi Song, Yongmi Kim, Dong-Uk Lee, Jaejin Lee, Dae Suk Kim, Ki Hun Kwon, Minsik Han, Byeongchan Choi, Hongjung Kim, Sanghyun Ku, Yeonuk Kim, Jong-Sam Kim, Sanghui Kim, Youngsuk Seo, Seungwook Oh, Dain Im, Haksong Kim, Jonghyuck Choi, Jinil Chung, Changhyun Lee, Yongsung Lee, Joo-Hwan Cho, Junhyun Chun, Jonghoon Oh
A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization Scheme. ISSCC (2019)
Cunlu Li, Dezun Dong, Xiangke Liao, John Kim, Changhyun Kim
DeepHiR: improving high-radix router throughput with deep hybrid memory buffer microarchitecture. ICS (2019)
Soonwan Cho, Jaemin Baek, Sangseok Hong, Hyoungwoong Lee, Changhyun Kim, Soohee Han
Time-delay control based on a nonlinear vehicle lateral dynamics. ASCC (2017)
Gwangsun Kim, Changhyun Kim, Jiyun Jeong, Mike Parker, John Kim
Contention-based congestion management in large-scale networks. MICRO (2016)
Jinhong Ahn, Jeaheung Lim, Seok-Hyang Kim, Jun-Yeon Yun, Changhyun Kim, Sang-Hoon Hong, Myoung-Jin Lee, Youngjune Park
16.6 Double-side CMOS-CNT biosensor array with padless structure for simple bare-die measurements in a medical environment. ISSCC (2015)
Hanjoon Kim, Changhyun Kim, Miri Kim, Kanghee Won, John Kim
Extending bufferless on-chip networks to high-throughput workloads. NOCS (2014)
Changhyun Kim, Kyuha Choi, Jong Beom Ra
Example-Based Super-Resolution via Structure Analysis of Patches. IEEE Signal Process. Lett. 20 (4) (2013)
Kyuha Choi, Changhyun Kim, Myung-Ho Kang, Jong Beom Ra
Resolution Improvement of Infrared Images Using Visible Image Information. IEEE Signal Process. Lett. 18 (10) (2011)
Kyuha Choi, Changhyun Kim, Jong Beom Ra
Infrared image enhancement based on an aligned high resolution visible image. ICIP (2010)
Uksong Kang, Hoeju Chung, Seongmoo Heo, Dukha Park, Hoon Lee, Jin Ho Kim, Soon-Hong Ahn, Sooho Cha, Jaesung Ahn, Dukmin Kwon, Jaewook Lee, Han-Sung Joo, Woo-Seop Kim, Dong Hyeon Jang, Nam-Seog Kim, Jung-Hwan Choi, Tae-Gyeong Chung, Jei-Hwan Yoo, Joo-Sun Choi, Changhyun Kim, Young-Hyun Jun
8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology. IEEE J. Solid State Circuits 45 (1) (2010)
Ki-Whan Song, Jinyoung Kim, Jae-Man Yoon, Sua Kim, Huijung Kim, Hyun-Woo Chung, Hyungi Kim, Kanguk Kim, Hwan-Wook Park, Hyun Chul Kang, Nam-Kyun Tak, Dukha Park, Woo-Seop Kim, Yeong-Taek Lee, Yong Chul Oh, Gyo-Young Jin, Jei-Hwan Yoo, Donggun Park, Kyungseok Oh, Changhyun Kim, Young-Hyun Jun
DRAM With Manufacturability and Enhanced Cell Efficiency. IEEE J. Solid State Circuits 45 (4) (2010)
Changhyun Kim, Kyuha Choi, Ho-young Lee, Kyuyoung Hwang, Jong Beom Ra
Robust learning-based super-resolution. ICIP (2010)
Uksong Kang, Hoeju Chung, Seongmoo Heo, Soon-Hong Ahn, Hoon Lee, Sooho Cha, Jaesung Ahn, Dukmin Kwon, Jin Ho Kim, Jaewook Lee, Han-Sung Joo, Woo-Seop Kim, Hyun-Kyung Kim, Eun-Mi Lee, So-Ra Kim, Keum-Hee Ma, Dong-Hyun Jang, Nam-Seog Kim, Man-Sik Choi, Sae-Jang Oh, Jung-Bae Lee, Tae-Kyung Jung, Jei-Hwan Yoo, Changhyun Kim
8Gb 3D DDR3 DRAM using through-silicon-via technology. ISSCC (2009)
Xueyi Yu, Woogeun Rhee, Zhihua Wang, Jung-Bae Lee, Changhyun Kim
A 0.4-to-1.6GHz low-OSR ΔΣ DLL with self-referenced multiphase generation. ISSCC (2009)
Ki-Tae Park, Myounggon Kang, Soonwook Hwang, Doo-Gon Kim, Hoosung Cho, Youngwook Jeong, Yong-Il Seo, Jae-hoon Jang, Hansoo Kim, Yeong-Taek Lee, Soon-Moon Jung, Changhyun Kim
A Fully Performance Compatible 45 nm 4-Gigabit Three Dimensional Double-Stacked Multi-Level NAND Flash Memory With Shared Bit-Line Structure. IEEE J. Solid State Circuits 44 (1) (2009)
Young-Chan Jang, Hoeju Chung, Youngdon Choi, Hwan-Wook Park, Jaekwan Kim, Soouk Lim, Jung Sunwoo, Moon-Sook Park, Hyung-Seuk Kim, Sang-Yun Kim, Yun-Sang Lee, Woo-Seop Kim, Jung-Bae Lee, Jei-Hwan Yoo, Changhyun Kim
BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel. IEEE J. Solid State Circuits 44 (11) (2009)
Changhyun Kim, Kyuha Choi, Jong Beom Ra
Improvement on learning-based super-resolution by adopting residual information and patch reliability. ICIP (2009)
Ki-Tae Park, Myounggon Kang, Doogon Kim, Soonwook Hwang, Byung Yong Choi, Yeong-Taek Lee, Changhyun Kim, Kinam Kim
A Zeroing Cell-to-Cell Interference Page Architecture With Temporary LSB Storing and Parallel MSB Program Scheme for MLC NAND Flash Memories. IEEE J. Solid State Circuits 43 (4) (2008)
Ki-Tae Park, Doo-Gon Kim, Soonwook Hwang, Myounggon Kang, Hoosung Cho, Youngwook Jeong, Yong-Il Seo, Jae-hoon Jang, Hansoo Kim, Soon-Moon Jung, Yeong-Taek Lee, Changhyun Kim, Won-Seong Lee
A 45nm 4Gb 3-Dimensional Double-Stacked Multi-Level NAND Flash Memory with Shared Bitline Structure. ISSCC (2008)
Changhyun Kim, Oh-Woog Kwon, Young Kil Kim
What is Needed the Most in MT-Supported Paper Writing. PACLIC (2008)
Kyu-hyoun Kim, Hoeju Chung, Woo-Seop Kim, Moon-Sook Park, Young-Chan Jang, Jinyoung Kim, Hwan-Wook Park, Uksong Kang, Paul W. Coteus, Joo-Sun Choi, Changhyun Kim
An 8 Gb/s/pin 9.6 ns Row-Cycle 288 Mb Deca-Data Rate SDRAM With an I/O Error Detection Scheme. IEEE J. Solid State Circuits 42 (1) (2007)
Kyu-hyoun Kim, Uksong Kang, Hoeju Chung, Dukha Park, Woo-Seop Kim, Young-Chan Jang, Moon-Sook Park, Hoon Lee, Jinyoung Kim, Jung Sunwoo, Hwan-Wook Park, Hyun-Kyung Kim, Su-Jin Chung, Jae-Kwan Kim, Hyung-Seuk Kim, Kee-Won Kwon, Young-Taek Lee, Joo-Sun Choi, Changhyun Kim
An 8Gb/s/pin 9.6ns Row-Cycle 288Mb Deca-Data Rate SDRAM with an I/O Error-Detection Scheme. ISSCC (2006)
Changhyun Kim
Advances in Memory Technology. VLDB (2006)
Kyu-hyoun Kim, Young-Soo Sohn, Chan-Kyoung Kim, Moon-Sook Park, Dong-Jin Lee, Woo-Seop Kim, Changhyun Kim
A 20-gb/s 256-mb DRAM with an inductorless quadrature PLL and a cascaded pre-emphasis transmitter. IEEE J. Solid State Circuits 41 (1) (2006)
Changhyun Kim
Future Memory Technology Trends and Challenges. ISQED (2006)
Churoo Park, Hoeju Chung, Yun-Sang Lee, Jaekwan Kim, JaeJun Lee, Moo Sung Chae, Dae-Hee Jung, Sung-Ho Choi, Seung-young Seo, Taek-Seon Park, Jun-Ho Shin, Jin-Hyung Cho, Seunghoon Lee, Ki-Whan Song, Kyu-Hyoun Kim, Jung-Bae Lee, Changhyun Kim, Soo-In Cho
minimization and self-calibration techniques. IEEE J. Solid State Circuits 41 (4) (2006)
Jin-Hyun Kim, Sua Kim, Woo-Seop Kim, Jung-Hwan Choi, Hong-Sun Hwang, Changhyun Kim, Suki Kim
A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling. IEEE J. Solid State Circuits 40 (1) (2005)
In-Young Chung, Youngsoo Sohn, Wonki Park, Changhyun Kim
Design Techniques of Delay-Locked Loop for Jitter Minimization in DRAM Applications. IEICE Trans. Electron. (4) (2005)
Jongsun Kim, Jung-Hwan Choi, Changhyun Kim, A. F. Chang, Ingrid Verbauwhede
A low power capacitive coupled bus interface based on pulsed signaling. CICC (2004)
Young-Soo Sohn, Seung-Jun Bae, Hong-June Park, Changhyun Kim, Soo-In Cho
A 2.2 Gbps CMOS look-ahead DFE receiver for multidrop channel with pin-to-pin time skew compensation. CICC (2003)
Changhyun Kim, Young Kil Kim, Munpyo Hong, Young Ae Seo, Sung Il Yang, Sung-Kwon Choi
Verb Pattern Based Korean-Chinese Machine Translation System. PACLIC (2002)
Changhyun Kim, Munpyo Hong, Yinxia Huang, Young Kil Kim, Sung Il Yang, Young Ae Seo, Sung-Kwon Choi
Korean-Chinese Machine Translation Based on Verb Patterns. AMTA (2002)
Yeon-Jae Jung, Seung-Wook Lee, Daeyun Shim, Wonchan Kim, Changhyun Kim, Soo-In Cho
A dual-loop delay-locked loop using multiple voltage-controlled delay lines. IEEE J. Solid State Circuits 36 (5) (2001)
Kyehyun Kyung, Hi-Choon Lee, Ki-Whan Song, Ho-Sung Song, Keewook Jung, Joon-Seo Moon, Byoung-Sul Kim, Sung-Burn Cho, Changhyun Kim, Soo-In Cho
A 2.5-V 2.0-Gbyte/s 288-Mb packet-based DRAM with enhanced cell efficiency and noise immunity. IEEE J. Solid State Circuits 36 (5) (2001)
Changhyun Kim, Kye-Hyun Kyung, W.-P. Jeong, J.-S. Kim, Byung-Sik Moon, Joon-Wan Chai, S.-M. Yim, Jung-Hwan Choi, K.-H. Han, C.-J. Park, Hong-Sun Hwang, H. Choi, Sung-Burn Cho, Clemenz L. Portmann, Soo-In Cho
A 2.5-V, 72-Mbit, 2.0-GByte/s packet-based DRAM with a 1.0-Gbps/pin interface. IEEE J. Solid State Circuits 34 (5) (1999)
Kyu-Chan Lee, Changhyun Kim, Hongil Yoon, Keum-Yong Kim, Byung-Sik Moon, Sang-Bo Lee, Jung-Hwa Lee, Nam-Jong Kim, Soo-In Cho
A 1 Gbit synchronous dynamic random access memory with an independent subarray-controlled scheme and a hierarchical decoding scheme. IEEE J. Solid State Circuits 33 (5) (1998)
Kyu-Chan Lee, Changhyun Kim, Dong-Ryul Ryu, Jai-Hoon Sim, Sang-Bo Lee, Byung-Sik Moon, Keum-Yong Kim, Nam-Jong Kim, Seung-Moon Yoo, Hongil Yoon, Jei-Hwan Yoo, Soo-In Cho
Low-voltage, high-speed circuit designs for gigabit DRAMs. IEEE J. Solid State Circuits 32 (5) (1997)
Changhyun Kim, Kensall D. Wise
Low-voltage electronics for the stimulation of biological neural networks using fully complementary BiCMOS circuits. IEEE J. Solid State Circuits 32 (10) (1997)
Changhyun Kim, Kensall D. Wise
A 64-site multishank CMOS low-profile neural stimulating probe. IEEE J. Solid State Circuits 31 (9) (1996)