A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling.
Jin-Hyun KimSua KimWoo-Seop KimJung-Hwan ChoiHong-Sun HwangChanghyun KimSuki KimPublished in: IEEE J. Solid State Circuits (2005)
Keyphrases
- low power
- bi directional
- high speed
- gigabit ethernet
- power consumption
- low cost
- associative memory
- single chip
- main memory
- high power
- logic circuits
- digital signal processing
- vlsi circuits
- power dissipation
- wireless transmission
- cmos technology
- low power consumption
- vlsi architecture
- mixed signal
- gate array
- neural network
- direct memory access
- real time