Youngdon Choi

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 19

Top Topics

Storage Devices

Garbage Collection

Top Venues

Environ. Model. Softw.

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Iman Maghami, Mohamed M. Morsy, Jeffrey M. Sadler, Jeffery S. Horsburgh, Pabitra Dash, Youngdon Choi, Kevin Chen, Martin Seul, Scott Black, David G. Tarboton, Jonathan L. Goodall
An extensible schema for capturing environmental model metadata: Implementation in the HydroShare online data repository. Environ. Model. Softw. 172 (2024)
Jinook Jung, Jun-Han Choi, Kyoung-Jun Roh, Jaewoo Park, Won-Mook Lim, Tae-Sung Kim, Han-Ki Jeong, Myoungbo Kwak, Jaeyoun Youn, Jeong-Don Ihm, Changsik Yoo, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko
A 4ns Settling Time FVF-Based Fast LDO Using Bandwidth Extension Techniques for HBM3. A-SSCC (2023)
Iman Maghami, Ashley E. Van Beusekom, Lauren E. Hay, Zhiyu Li, Andrew Bennett, Youngdon Choi, Bart Nijssen, Shaowen Wang, David Tarboton, Jonathan L. Goodall
Building cyberinfrastructure for the reuse and reproducibility of complex hydrologic modeling studies. Environ. Model. Softw. 164 (2023)
Dong-Hyun Yoon, He Junsen, Kwang-Hyun Baek, Youngdon Choi, Jung-Hwan Choi, Tony Tae-Hyoung Kim
A Time-Based PAM-4 Transceiver Using Single Path Decoder and Fast-Stochastic Calibration Techniques. A-SSCC (2023)
Hyeongmin Seo, Jiyun Han, Kyungmin Kim, Baek-Jin Lim, EunSeok Shin, Youngdon Choi, Hyungjong Ko, Jung-Hwan Choi, Sang-Hyun Lee, Changsik Yoo, Jaeduk Han
A 12-Gb/s Baud-Rate Clock and Data Recovery With 75% Phase-Detection Probability by Precoding and Integration-Hold-Reset Frontend. IEEE Trans. Circuits Syst. II Express Briefs 70 (2) (2023)
Hyoung-Jung Kim, Jae-Hyuk Lee, Jae-Geun Lim, Jun-Ho Boo, Ho-Jin Kim, Seong-Bo Park, Youngdon Choi, Jung-Hwan Choi, Gil-Cho Ahn
A 430-MS/s 7-b Asynchronous SAR ADC With a 40 fF Input Sampling Capacitor. ISOCC (2022)
Joohwan Kim, Junyoung Park, Jindo Byun, Changkyu Seol, Chang Soo Yoon, EunSeok Shin, Hyunyoon Cho, Youngdo Um, Sucheol Lee, Hyungmin Jin, Kwangseob Shin, Hyunsub Norbert Rie, Minsu Jung, Jin-Hee Park, Go-Eun Cha, Minjae Lee, YoungMin Kim, Byeori Han, Yuseong Jeon, Jisun Lee, Hyejeong So, Sungduk Kim, Wansoo Park, Tae Young Kim, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Sang-Hyun Lee
A 60-Gb/s/pin single-ended PAM-4 transmitter with timing skew training and low power data encoding in mimicked 10nm class DRAM process. CICC (2022)
Hyunsub Norbert Rie, Chang Soo Yoon, Jindo Byun, Sucheol Lee, Garam Kim, Joohwan Kim, Junyoung Park, Hyunyoon Cho, Youngdo Um, Hyungmin Jin, Kwangseob Shin, Minsu Jung, Go-Eun Cha, Minjae Lee, YoungMin Kim, Byeori Han, Yuseong Jeon, Jisun Lee, EunSeok Shin, Hyuk-Jun Kwon, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko
A 40-Gb/s/pin Low-Voltage POD Single-Ended PAM-4 Transceiver with Timing Calibrated Reset-less Slicer and Bidirectional T-Coil for GDDR7 Application. VLSI Technology and Circuits (2022)
Hojun Yoon, Wonjoo Jung, Jaewoo Park, Jindo Byun, Hyungmin Jin, Hyunyoon Cho, Youngmin Kim, Baek-Jin Lim, Young-Chul Cho, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Changsik Yoo, Sang-Hyun Lee
A 3.2-12.8Gb/s Duty-Cycle Compensating Quadrature Error Corrector for DRAM Interfaces, With Fast Locking and Low Power Characteristics. ESSCIRC (2021)
Hyungmin Jin, Jindo Byun, Hyunyoon Cho, Hojun Yoon, Jin-Hee Park, Kyoungsoo Kim, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Sang-Hyun Lee
A 24Gb/s/pin PAM-4 Built Out Tester chip enabling PAM-4 chips test with NRZ interface ATE. A-SSCC (2021)
Doo-Hyun Kim, Hyunggon Kim, Sung-Won Yun, Youngsun Song, Jisu Kim, Sung-Min Joe, Kyung-Hwa Kang, Joonsuc Jang, Hyun-Jun Yoon, Kangbin Lee, Minseok Kim, Joonsoo Kwon, Jonghoo Jo, Sehwan Park, Jiyoon Park, Jisoo Cho, Sohyun Park, Garam Kim, Jinbae Bang, Heejin Kim, Jongeun Park, Deokwoo Lee, Seonyong Lee, Hwajun Jang, Hanjun Lee, Donghyun Shin, Jungmin Park, Jungkwan Kim, Jongmin Kim, Kichang Jang, II Han Park, Seuna Hyun Moon, Myung-Hoon Choi, Pansuk Kwak, Joo-Yong Park, Youngdon Choi, Sanglok Kim, Seungjae Lee, Dongku Kang, Jeong-Don Lim, Dae-Seok Byeon, Ki-Whan Song, Jung-Hwan Choi, Sangjoon Hwang, Jaeheon Jeong
13.1 A 1Tb 4b/cell NAND Flash Memory with tPROG=2ms, tR=110µs and 1.2Gb/s High-Speed IO Rate. ISSCC (2020)
Bakinam T. Essawy, Jonathan L. Goodall, Daniel Voce, Mohamed M. Morsy, Jeffrey M. Sadler, Youngdon Choi, David G. Tarboton, Tanu Malik
A taxonomy for reproducible and replicable research in environmental modelling. Environ. Model. Softw. 134 (2020)
Jason Chuah, Madeline Deeds, Tanu Malik, Youngdon Choi, Jonathan L. Goodall
Documenting Computing Environments for Reproducible Experiments. PARCO (2019)
Dongku Kang, Minsu Kim, Suchang Jeon, Wontaeck Jung, Jooyong Park, Gyo Soo Choo, Dong-Kyo Shim, Anil Kavala, Seungbum Kim, Kyung-Min Kang, Jiyoung Lee, Kuihan Ko, Hyun Wook Park, ByungJun Min, Changyeon Yu, Sewon Yun, Nahyun Kim, Yeonwook Jung, Sungwhan Seo, Sunghoon Kim, Moo Kyung Lee, Joo-Yong Park, James C. Kim, Young San Cha, Kwangwon Kim, Youngmin Jo, Hyun-Jin Kim, Youngdon Choi, Jindo Byun, Ji-hyun Park, Kiwon Kim, Tae-Hong Kwon, Young-Sun Min, Chiweon Yoon, Youngcho Kim, Dong-Hun Kwak, Eungsuk Lee, Wook-Ghee Hahn, Ki-Sung Kim, Kyungmin Kim, Euisang Yoon, Wontae Kim, Inryul Lee, Seunghyun Moon, Jeong-Don Ihm, Dae-Seok Byeon, Ki-Whan Song, Sangjoon Hwang, Kyehyun Kyung
-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s Interface. ISSCC (2019)
Fangzheng Lyu, Dandong Yin, Anand Padmanabhan, Youngdon Choi, Jonathan L. Goodall, Anthony M. Castronova, David Tarboton, Shaowen Wang
Reproducible Hydrological Modeling with CyberGIS-Jupyter: A Case Study on SUMMA. PEARC (2019)
Chulbum Kim, Doo-Hyun Kim, Woopyo Jeong, Hyun-Jin Kim, Il-Han Park, Hyun Wook Park, Jong-Hoon Lee, Jiyoon Park, Yang-Lo Ahn, Ji Young Lee, Seungbum Kim, Hyun-Jun Yoon, Jaedoeg Yu, Nayoung Choi, Nahyun Kim, Hwajun Jang, Jonghoon Park, Seunghwan Song, Yongha Park, Jinbae Bang, Sanggi Hong, Youngdon Choi, Moosung Kim, Hyunggon Kim, Pansuk Kwak, Jeong-Don Ihm, Dae-Seok Byeon, Jin-Yub Lee, Ki-Tae Park, Kyehyun Kyung
A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory. IEEE J. Solid State Circuits 53 (1) (2018)
Seungjae Lee, Chulbum Kim, Minsu Kim, Sung-Min Joe, Joonsuc Jang, Seungbum Kim, Kangbin Lee, Jisu Kim, Jiyoon Park, Hanjun Lee, Min-Seok Kim, Seonyong Lee, SeonGeon Lee, Jinbae Bang, Dongjin Shin, Hwajun Jang, Deokwoo Lee, Nahyun Kim, Jonghoo Jo, Jonghoon Park, Sohyun Park, Youngsik Rho, Yongha Park, Hojoon Kim, Cheon An Lee, Chungho Yu, Young-Sun Min, Moosung Kim, Kyungmin Kim, Seunghyun Moon, Hyun-Jin Kim, Youngdon Choi, YoungHwan Ryu, Jinwon Choi, Minyeong Lee, Jungkwan Kim, Gyo Soo Choo, Jeong-Don Lim, Dae-Seok Byeon, Ki-Whan Song, Ki-Tae Park, Kyehyun Kyung
A 1Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12MB/s program throughput. ISSCC (2018)
Chulbum Kim, Ji-Ho Cho, Woopyo Jeong, Il-Han Park, Hyun Wook Park, Doo-Hyun Kim, Daewoon Kang, Sunghoon Lee, Ji-Sang Lee, Wontae Kim, Jiyoon Park, Yang-Lo Ahn, Jiyoung Lee, Jong-Hoon Lee, Seungbum Kim, Hyun-Jun Yoon, Jaedoeg Yu, Nayoung Choi, Yelim Kwon, Nahyun Kim, Hwajun Jang, Jonghoon Park, Seunghwan Song, Yongha Park, Jinbae Bang, Sangki Hong, Byunghoon Jeong, Hyun-Jin Kim, Chunan Lee, Young-Sun Min, Inryul Lee, In-Mo Kim, Sung-Hoon Kim, Dongkyu Yoon, Ki-Sung Kim, Youngdon Choi, Moosung Kim, Hyunggon Kim, Pansuk Kwak, Jeong-Don Ihm, Dae-Seok Byeon, Jin-Yub Lee, Ki-Tae Park, Kyehyun Kyung
11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory. ISSCC (2017)
Junyoung Ko, Jisu Kim, Youngdon Choi, Hyun Kook Park, Seong-Ook Jung
Temperature-Tracking Sensing Scheme With Adaptive Precharge and Noise Compensation Scheme in PRAM. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2015)
Youngdon Choi, Ickhyun Song, Mu-Hui Park, Hoeju Chung, Sanghoan Chang, Beakhyoung Cho, Jinyoung Kim, Younghoon Oh, Dukmin Kwon, Jung Sunwoo, Junho Shin, Yoohwan Rho, Changsoo Lee, Min Gu Kang, Jaeyun Lee, Yongjin Kwon, Soehee Kim, Jaewhan Kim, Yong-jun Lee, Qi Wang, Sooho Cha, Sujin Ahn, Hideki Horii, Jaewook Lee, KiSeung Kim, Han-Sung Joo, KwangJin Lee, Yeong-Taek Lee, Jei-Hwan Yoo, Gitae Jeong
A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth. ISSCC (2012)
Hoeju Chung, Byung-Hoon Jeong, ByungJun Min, Youngdon Choi, Beak-Hyung Cho, Junho Shin, Jinyoung Kim, Jung Sunwoo, Joon-min Park, Qi Wang, Yong-jun Lee, Sooho Cha, Dukmin Kwon, Sang-Tae Kim, Sunghoon Kim, Yoohwan Rho, Mu-Hui Park, Jaewhan Kim, Ickhyun Song, Sunghyun Jun, Jaewook Lee, KiSeung Kim, Ki-won Lim, Won-ryul Chung, ChangHan Choi, HoGeun Cho, Inchul Shin, Woochul Jun, Seokwon Hwang, Ki-Whan Song, KwangJin Lee, Sang-whan Chang, Woo-Yeong Cho, Jei-Hwan Yoo, Young-Hyun Jun
A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW. ISSCC (2011)
Young-Chan Jang, Hoeju Chung, Youngdon Choi, Hwan-Wook Park, Jaekwan Kim, Soouk Lim, Jung Sunwoo, Moon-Sook Park, Hyung-Seuk Kim, Sang-Yun Kim, Yun-Sang Lee, Woo-Seop Kim, Jung-Bae Lee, Jei-Hwan Yoo, Changhyun Kim
BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel. IEEE J. Solid State Circuits 44 (11) (2009)
Youngdon Choi, Deog-Kyoon Jeong, Wontae Kim
Jitter transfer analysis of tracked oversampling techniques for multigigabit clock and data recovery. IEEE Trans. Circuits Syst. II Express Briefs 50 (11) (2003)
Sang-Hyun Lee, Moon-Sang Hwang, Youngdon Choi, Sungjoon Kim, Yongsam Moon, Bong-Joon Lee, Deog-Kyoon Jeong, Wonchan Kim, Young-June Park, Gijung Ahn
A 5-Gb/s 0.25-μm CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit. IEEE J. Solid State Circuits 37 (12) (2002)