Jun-Ho Boo

Publication Activity (10 Years)

Years Active: 2019-2024
Publications (10 Years): 14

Top Topics

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Kang-Il Cho, Jun-Ho Boo, Jae-Geun Lim, Gil-Cho Ahn
A CMOS Analog Front-End for Hall Sensor Readout IC. ICEIC (2024)
Mi-Ji Go, Jun-Ho Boo, Jae-Geun Lim, Hyoung-Jung Kim, Jae-Hyuk Lee, Seong-Bo Park, Byeongho Yu, Won-Jun Cho, Gil-Cho Ahn
A 12-bit 3-MS/s Synchronous SAR ADC With a Hybrid RC DAC. ISOCC (2023)
Seong-Bo Park, Jun-Ho Boo, Jae-Geun Lim, Hyoung-Jung Kim, Jae-Hyuk Lee, Won-Jun Cho, Gil-Cho Ahn
A Second-Order DT Delta-Sigma Modulator with Noise-Shaping SAR Quantizer. ISOCC (2023)
Ho-Jin Kim, Jun-Ho Boo, Kang-Il Cho, Yong-Sik Kwak, Gil-Cho Ahn
A Single-Loop Third-Order 10-MHz BW Source-Follower-Integrator Based Discrete-Time Delta-Sigma ADC. IEEE Trans. Circuits Syst. II Express Briefs 70 (2) (2023)
Hyoung-Jung Kim, Jae-Hyuk Lee, Jae-Geun Lim, Jun-Ho Boo, Ho-Jin Kim, Seong-Bo Park, Youngdon Choi, Jung-Hwan Choi, Gil-Cho Ahn
A 430-MS/s 7-b Asynchronous SAR ADC With a 40 fF Input Sampling Capacitor. ISOCC (2022)
Yong-Sik Kwak, Ho-Jin Kim, Kang-Il Cho, Jun-Ho Boo, Gil-Cho Ahn
103dB DR Switched-Capacitor Audio Delta-Sigma Modulator Using Input-Referred kT/C Noise Reduction Technique. A-SSCC (2021)
Ju-Hye Han, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Jae Sang Kim, Gil-Cho Ahn
A 96dB Dynamic Range 2kHz Bandwidth 2nd Order Delta-Sigma Modulator Using Modified Feed-Forward Architecture With Delayed Feedback. IEEE Trans. Circuits Syst. II Express Briefs 68 (5) (2021)
Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn
A Single-Trim Switched Capacitor CMOS Bandgap Reference With a 3σ Inaccuracy of +0.02%, -0.12% for Battery-Monitoring Applications. IEEE J. Solid State Circuits 56 (4) (2021)
Tae-Gwan Kim, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Gil-Cho Ahn
A Third-Order DT Delta-Sigma Modulator With Noise-Coupling Technique. ISOCC (2020)
Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Jun-Sang Park, Seung-Hoon Lee, Gil-Cho Ahn
A 10-b 900-MS/s Single-Channel Pipelined-SAR ADC Using Current-Mode Reference Scaling. A-SSCC (2020)
Jun-Sang Park, Je-Min Jeon, Jun-Ho Boo, Jae-Hyuk Lee, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn, Seung-Hoon Lee
A 2.2mW 12-bit 200MS/s 28nm CMOS Pipelined SAR ADC with Dynamic Register-Based High-Speed SAR Logic. A-SSCC (2020)
Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn
A Single-Trim Switched Capacitor CMOS Bandgap Reference with a 3σ Inaccuracy of +0.02%, -0.12% for Battery Monitoring Applications. VLSI Circuits (2020)
Kang-Il Cho, Yong-Sik Kwak, Ho-Jin Kim, Jun-Ho Boo, Seung-Hoon Lee, Gil-Cho Ahn
A 10-b 320-MS/s Dual-Residue Pipelined SAR ADC with Binary Search Current Interpolator. CICC (2019)
Jun-Young Kil, Kang-Il Cho, Ho-Jin Kim, Jun-Ho Boo, Yong-Sik Kwak, Gil-Cho Ahn
A 101 dB Dynamic Range Delta-Sigma Modulator Using Modified Feed-Forward Architecture for Audio Application. ISOCC (2019)