Il-Han Park

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 6

Top Topics

Garbage Collection

Storage Management

Top Venues

VLSI Technology and Circuits

IEEE J. Solid State Circuits

Publications

Jong Oh Park, Jun Seong Lee, Il-Han Park
Magnetic Field Analysis of Electric Current in Coplanar Coils Using Equivalent Permanent Magnetization and Magnetic Scalar Potential. IEEE Access 12 (2024)
Kyungmoon Kim, Yujeong Seo, Sejun Park, Woojae Jang, Dongho Yoo, Joonsung Lim, Il-Han Park, Jaeduk Lee, Kyungyoon Noh, Sujin Ahn, Sunghoi Hur
High Bit Cost Scalability and Reliable Cell Characteristics for 7th Generation 1Tb 4Bit/Cell 3D-NAND Flash. VLSI Technology and Circuits (2023)
Hyemin Choe, Jeongju Jee, Seung-Chan Lim, Sung-Min Joe, Il-Han Park, Hyuncheol Park
Machine-Learning-Based Read Reference Voltage Estimation for NAND Flash Memory Systems Without Knowledge of Retention Time. IEEE Access 8 (2020)
Chulbum Kim, Doo-Hyun Kim, Woopyo Jeong, Hyun-Jin Kim, Il-Han Park, Hyun Wook Park, Jong-Hoon Lee, Jiyoon Park, Yang-Lo Ahn, Ji Young Lee, Seungbum Kim, Hyun-Jun Yoon, Jaedoeg Yu, Nayoung Choi, Nahyun Kim, Hwajun Jang, Jonghoon Park, Seunghwan Song, Yongha Park, Jinbae Bang, Sanggi Hong, Youngdon Choi, Moosung Kim, Hyunggon Kim, Pansuk Kwak, Jeong-Don Ihm, Dae-Seok Byeon, Jin-Yub Lee, Ki-Tae Park, Kyehyun Kyung
A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory. IEEE J. Solid State Circuits 53 (1) (2018)
Chulbum Kim, Ji-Ho Cho, Woopyo Jeong, Il-Han Park, Hyun Wook Park, Doo-Hyun Kim, Daewoon Kang, Sunghoon Lee, Ji-Sang Lee, Wontae Kim, Jiyoon Park, Yang-Lo Ahn, Jiyoung Lee, Jong-Hoon Lee, Seungbum Kim, Hyun-Jun Yoon, Jaedoeg Yu, Nayoung Choi, Yelim Kwon, Nahyun Kim, Hwajun Jang, Jonghoon Park, Seunghwan Song, Yongha Park, Jinbae Bang, Sangki Hong, Byunghoon Jeong, Hyun-Jin Kim, Chunan Lee, Young-Sun Min, Inryul Lee, In-Mo Kim, Sung-Hoon Kim, Dongkyu Yoon, Ki-Sung Kim, Youngdon Choi, Moosung Kim, Hyunggon Kim, Pansuk Kwak, Jeong-Don Ihm, Dae-Seok Byeon, Jin-Yub Lee, Ki-Tae Park, Kyehyun Kyung
11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory. ISSCC (2017)
Seungjae Lee, Jin-Yub Lee, Il-Han Park, Jong-Yeol Park, Sung-Won Yun, Minsu Kim, Jong-Hoon Lee, Min-Seok Kim, Kangbin Lee, Taeeun Kim, Byungkyu Cho, Dooho Cho, Sangbum Yun, Jung-No Im, Hyejin Yim, Kyung-Hwa Kang, Suchang Jeon, Sungkyu Jo, Yang-Lo Ahn, Sung-Min Joe, Suyong Kim, Deok-kyun Woo, Jiyoon Park, Hyun Wook Park, Youngmin Kim, Jonghoon Park, Yongsu Choi, Makoto Hirano, Jeong-Don Ihm, Byunghoon Jeong, Seon-Kyoo Lee, Moosung Kim, Hokil Lee, Sungwhan Seo, Hongsoo Jeon, Chan-ho Kim, Hyunggon Kim, Jintae Kim, Yongsik Yim, Hoosung Kim, Dae-Seok Byeon, Hyang-Ja Yang, Ki-Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi
7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate. ISSCC (2016)
Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun
Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classification for Next Generation Multi-Bit/Cell NAND FLASH. IEEE J. Solid State Circuits 48 (4) (2013)
Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, ByungJun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC (2012)
Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun
Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH. VLSIC (2012)
Yoon Kim, Seongjae Cho, Gil Sung Lee, Il-Han Park, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park
3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array. IEICE Trans. Electron. (5) (2009)
Doo-Hyun Kim, Il-Han Park, Seongjae Cho, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park
Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory. IEICE Trans. Electron. (5) (2009)
Jang-Gn Yun, Il-Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong Duk Lee, Byung-Gook Park
Characterization of 2-bit Recessed Channel Memory with Lifted-Charge Trapping Node (L-CTN) Scheme. IEICE Trans. Electron. (5) (2008)
Seongjae Cho, Il-Han Park, Jung Hoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park
Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI). IEICE Trans. Electron. (5) (2008)
Seongjae Cho, Jang-Gn Yun, Il-Han Park, Jung Hoon Lee, Jong Pil Kim, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park
Analyses on Current Characteristics of 3-D MOSFET Determined by Junction Doping Profiles for Nonvolatile Memory Devices. IEICE Trans. Electron. (5) (2007)