Jin-Man Han

Publication Activity (10 Years)

Years Active: 1996-2016
Publications (10 Years): 1

Top Topics

Buffer Management

Storage Systems

Top Venues

IEEE J. Solid State Circuits

Publications

Sungdae Choi, Jin-Man Han
Session 7 overview: Nonvolatile memory solutions. ISSCC (2016)
Ki-Tae Park, Sangwan Nam, Dae-Han Kim, Pansuk Kwak, Doosub Lee, Yoon-Hee Choi, Myung-Hoon Choi, Dong-Hun Kwak, Doo-Hyun Kim, Minsu Kim, Hyun Wook Park, Sang-Won Shim, Kyung-Min Kang, Sang-Won Park, Kangbin Lee, Hyun-Jun Yoon, Kuihan Ko, Dong-Kyo Shim, Yang-Lo Ahn, Jinho Ryu, Donghyun Kim, Kyunghwa Yun, Joonsoo Kwon, Seunghoon Shin, Dae-Seok Byeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Jeong-Hyuk Choi, Kinam Kim
Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming. IEEE J. Solid State Circuits 50 (1) (2015)
Ki-Tae Park, Jin-Man Han, Dae-Han Kim, Sangwan Nam, Kihwan Choi, Minsu Kim, Pansuk Kwak, Doosub Lee, Yoon-Hee Choi, Kyung-Min Kang, Myung-Hoon Choi, Dong-Hun Kwak, Hyun Wook Park, Sang-Won Shim, Hyun-Jun Yoon, Doo-Hyun Kim, Sang-Won Park, Kangbin Lee, Kuihan Ko, Dong-Kyo Shim, Yang-Lo Ahn, Jeunghwan Park, Jinho Ryu, Donghyun Kim, Kyunghwa Yun, Joonsoo Kwon, Seunghoon Shin, Dongkyu Youn, Won-Tae Kim, Taehyun Kim, Sung-Jun Kim, Sungwhan Seo, Hyunggon Kim, Dae-Seok Byeon, Hyang-Ja Yang, Moosung Kim, Myong-Seok Kim, Jinseon Yeon, Jae-hoon Jang, Han-Soo Kim, Woonkyung Lee, Duheon Song, Sungsoo Lee, Kyehyun Kyung, Jeong-Hyuk Choi
19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming. ISSCC (2014)
Leland Chang, Shannon Morton, Ken Chang, Jin-Man Han, Piero Malcovati, Vladimir Stojanovic
F2: VLSI power-management techniques: Principles and applications. ISSCC (2013)
Jin-Man Han, Daniele Vimercati
Session 12 overview: Non-volatile memory solutions. ISSCC (2013)
Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun
Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classification for Next Generation Multi-Bit/Cell NAND FLASH. IEEE J. Solid State Circuits 48 (4) (2013)
Seung-Hwan Shin, Dong-Kyo Shim, Jaeyong Jeong, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, Tae-Young Kim, Hyun Wook Park, Hyun-Jun Yoon, Youngsun Song, Yoon-Hee Choi, Sang-Won Shim, Yang-Lo Ahn, Ki-Tae Park, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun
A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory. VLSIC (2012)
Chulbum Kim, Jinho Ryu, Tae-Sung Lee, Hyunggon Kim, Jaewoo Lim, Jaeyong Jeong, Seonghwan Seo, Hongsoo Jeon, Bokeun Kim, Inyoul Lee, Dooseop Lee, Pansuk Kwak, Seongsoon Cho, Yongsik Yim, Changhyun Cho, Woopyo Jeong, Kwang-Il Park, Jin-Man Han, Duheon Song, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun
A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface. IEEE J. Solid State Circuits 47 (4) (2012)
Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, ByungJun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC (2012)
Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun
Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH. VLSIC (2012)
Ki-Tae Park, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, In-Mo Kim, Bo-Geun Kim, Min-Seok Kim, Yoon-Hee Choi, Seung-Hwan Shin, Youngson Song, Joo-Yong Park, Jae-Eun Lee, Chang-Gyu Eun, Ho-Chul Lee, Hyeong-Jun Kim, Jun-Hee Lee, Jong-Young Kim, Tae-Min Kweon, Hyun-Jun Yoon, Taehyun Kim, Dong-Kyo Shim, Jongsun Sel, Ji-Yeon Shin, Pansuk Kwak, Jin-Man Han, Keon-Soo Kim, Sungsoo Lee, Youngho Lim, Tae-Sung Jung
A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology. ISSCC (2011)
Jei-Hwan Yoo, Chang-Hyun Kim, Kyu-Chan Lee, Kye-Hyun Kyung, Seung-Moon Yoo, Jung-Hwa Lee, Moon-Hae Son, Jin-Man Han, Bok-Moon Kang, Ejaz Haq, Sang-Bo Lee, Jai-Hoon Sim, Joung-Ho Kim, Byung-Sik Moon, Keum-Yong Kim, Jae-Gwan Park, Kyu-Phil Lee, Kang-Yoon Lee, Ki-Nam Kim, Soo-In Cho, Jong-Woo Park, Hyung-Kyu Lim
A 32-bank 1 Gb self-strobing synchronous DRAM with 1 GByte/s bandwidth. IEEE J. Solid State Circuits 31 (11) (1996)