Byung-Gil Jeon

Publication Activity (10 Years)

Years Active: 2000-2012
Publications (10 Years): 0

Top Venues

Publications

Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, ByungJun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC (2012)
ByungJun Min, Kang-Woon Lee, Han-Ju Lee, So-Ra Kim, Seung-Gyu Oh, Byung-Gil Jeon, Hee-Hyun Yang, Min-Kyu Kim, Sung-Hee Cho, Honsik Cheong, Chilhee Chung, Kinam Kim
An embedded nonvolatile FRAM with electrical fuse repair scheme and one time programming scheme for high performance smart cards. CICC (2005)
Mun-Kyu Choi, Byung-Gil Jeon, Nakwon Jang, Byung-Jun Min, Yoon-Jong Song, Sung-Yung Lee, Hyun-Ho Kim, Dong-Jin Jung, Heung-Jin Joo, Kinam Kim
A 0.25-μm 3.0-V 1T1C 32-Mb nonvolatile ferroelectric RAM with address transition detector and current forcing latch sense amplifier scheme. IEEE J. Solid State Circuits 37 (11) (2002)
Yeonbae Chung, Byung-Gil Jeon, Kang-Deog Suh
A 3.3-V, 4-Mb nonvolatile ferroelectric RAM with selectively driven double-pulsed plate read/write-back scheme. IEEE J. Solid State Circuits 35 (5) (2000)
Byung-Gil Jeon, Mun-Kyu Choi, Yoonjong Song, Seung-Kyu Oh, Yeonbae Chung, Kang-Deog Suh, Kinam Kim
A 0.4-μm 3.3-V 1T1C 4-Mb nonvolatile ferroelectric RAM with fixed bitline reference voltage scheme and data protection circuit. IEEE J. Solid State Circuits 35 (11) (2000)