Mingjie Lin

ORCID

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 77

Top Venues

Publications

Apan Dastider, Hao Fang, Mingjie Lin
RETRO: Reactive Trajectory Optimization for Real-Time Robot Motion Planning in Dynamic Environments. ICRA (2024)
Apan Dastider, Hao Fang, Mingjie Lin
APEX: Ambidextrous Dual-Arm Robotic Manipulation Using Collision-Free Generative Diffusion Models. CoRR (2024)
Rakin Muhammad Shadab, Yu Zou, Mingjie Lin
CTR+: A High-Performance Metadata Access Scheme for Secure Embedded Memory in Heterogeneous Computing Systems. HOST (2024)
Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Amro Awad, Mingjie Lin
A Secure Computing System With Hardware-Efficient Lazy Bonsai Merkle Tree for FPGA-Attached Embedded Memory. IEEE Trans. Dependable Secur. Comput. 21 (4) (2024)
Sanjay Gandham, Lingxiang Yin, Hao Zheng, Mingjie Lin
OCMGen: Extended Design Space Exploration with Efficient FPGA Memory Inference. FCCM (2023)
Sanjay Gandham, Lingxiang Yin, Hao Zheng, Mingjie Lin
SAGA: Sparsity-Agnostic Graph Convolutional Network Acceleration with Near-Optimal Workload Balance. ICCAD (2023)
Azzam Alhussain, Mingjie Lin
FPGA-QHAR: Throughput-Optimized for Quantized Human Action Recognition on The Edge. CoRR (2023)
Apan Dastider, Hao Fang, Mingjie Lin
RETRO: Reactive Trajectory Optimization for Real-Time Robot Motion Planning in Dynamic Environments. CoRR (2023)
Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Amro Awad, Mingjie Lin
HMT: A Hardware-centric Hybrid Bonsai Merkle Tree Algorithm for High-performance Authentication. ACM Trans. Embed. Comput. Syst. 22 (4) (2023)
Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Mingjie Lin
OMT: A Run-time Adaptive Architectural Framework for Bonsai Merkle Tree-Based Secure Authentication with Embedded Heterogeneous Memory. HOST (2023)
Apan Dastider, Mingjie Lin
DAMON: Dynamic Amorphous Obstacle Navigation using Topological Manifold Learning and Variational Autoencoding. IROS (2023)
Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Mingjie Lin
OMT: A Demand-Adaptive, Hardware-Targeted Bonsai Merkle Tree Framework for Embedded Heterogeneous Memory Platform. FPGA (2023)
Yu Zou, Amro Awad, Mingjie Lin
DirectNVM: Hardware-accelerated NVMe SSDs for High-performance Embedded Computing. ACM Trans. Embed. Comput. Syst. 21 (1) (2022)
Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Amro Awad, Mingjie Lin
HMT: A Hardware-Centric Hybrid Bonsai Merkle Tree Algorithm for High-Performance Authentication. FPGA (2022)
Yu Zou, Kazi Abu Zubair, Mazen Al-Wadi, Rakin Muhammad Shadab, Sanjay Gandham, Amro Awad, Mingjie Lin
ARES: Persistently Secure Non-Volatile Memory with Processor-transparent and Hardware-friendly Integrity Verification and Metadata Recovery. ACM Trans. Embed. Comput. Syst. 21 (1) (2022)
Apan Dastider, Sayyed Jaffar Ali Raza, Mingjie Lin
Learning adaptive control in dynamic environments using reproducing kernel priors with bayesian policy gradients. SAC (2022)
Apan Dastider, Mingjie Lin
Non-Parametric Stochastic Policy Gradient with Strategic Retreat for Non-Stationary Environment. CASE (2022)
Apan Dastider, Mingjie Lin
Dynamically Avoiding Amorphous Obstacles with Topological Manifold Learning and Deep Autoencoding. CoRR (2022)
Azzam Alhussain, Mingjie Lin
Hardware-Efficient Template-Based Deep CNNs Accelerator Design. CoRR (2022)
Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Amro Awad, Mingjie Lin
HMT: A Hardware-Centric Hybrid Bonsai Merkle Tree Algorithm for High-Performance Authentication. CoRR (2022)
Azzam Alhussain, Mingjie Lin
Hardware-Efficient Template-Based Deep CNNs Accelerator Design. NAS (2022)
Apan Dastider, Mingjie Lin
Reactive Whole-Body Obstacle Avoidance for Collision-Free Human-Robot Interaction with Topological Manifold Learning. CoRR (2022)
Azzam Alhussain, Mingjie Lin
Hardware-Efficient Deconvolution-Based GAN for Edge Computing. CISS (2022)
Apan Dastider, Mingjie Lin
Intercepting A Flying Target While Avoiding Moving Obstacles: A Unified Control Framework With Deep Manifold Learning. CoRR (2022)
Azzam Alhussain, Mingjie Lin
Hardware-Efficient Deconvolution-Based GAN for Edge Computing. CoRR (2022)
Apan Dastider, Mingjie Lin
Non-Parametric Stochastic Policy Gradient with Strategic Retreat for Non-Stationary Environment. CoRR (2022)
Sayyed Jaffar Ali Raza, Apan Dastider, Mingjie Lin
Survivable Robotic Control through Guided Bayesian Policy Search with Deep Reinforcement Learning. CASE (2021)
Kevin A. White, Mingjie Lin, Brian N. Kim
Design of Scalable Neurotransmitter-mediated Biohybrid Synapse. BioCAS (2021)
Yu Zou, Amro Awad, Mingjie Lin
HERMES: Hardware-Efficient Speculative Dataflow Architecture for Bonsai Merkle Tree-Based Memory Authentication. HOST (2021)
Sanjay Gandham, Rakin Muhammad Shadab, Mingjie Lin
ARC: Reconfigurable Cache Security Assurance with Application-Specific Randomized Mapping in FPGA-Based Heterogeneous Computing. FCCM (2021)
Apan Dastider, Sayyed Jaffar Ali Raza, Mingjie Lin
Safe Locomotion Within Confined Workspace using Deep Reinforcement Learning. IRC (2021)
Yu Zou, Mingjie Lin
FERMAT: FPGA-Accelerated Heterogeneous Computing Platform Near NVMe Storage. FCCM (2021)
Sayyed Jaffar Ali Raza, Apan Dastider, Mingjie Lin
Survivable Robotic Control through Guided Bayesian Policy Search with Deep Reinforcement Learning. CoRR (2021)
Sayyed Jaffar Ali Raza, Apan Dastider, Mingjie Lin
Survivable Hyper-Redundant Robotic Arm with Bayesian Policy Morphing. CASE (2020)
Sayyed Jaffar Ali Raza, Apan Dastider, Mingjie Lin
Survivable Hyper-Redundant Robotic Arm with Bayesian Policy Morphing. CoRR (2020)
Sayyed Jaffar Ali Raza, Apan Dastider, Mingjie Lin
Developmentally Synthesizing Earthworm-Like Locomotion Gaits with Bayesian-Augmented Deep Deterministic Policy Gradients (DDPG). CASE (2020)
Yu Zou, Mingjie Lin
Massively Simulating Adiabatic Bifurcations with FPGA to Solve Combinatorial Optimization. FPGA (2020)
Juan Escobedo, Mingjie Lin
DOMIS: Dual-Bank Optimal Micro-Architecture for Iterative Stencils. FPGA (2020)
Stephen M. Williams, Mingjie Lin
Reactive Signal Obfuscation with Time-Fracturing to Counter Information Leakage in FPGAs. FPGA (2020)
Yu Zou, Mingjie Lin
Graph-Morphing: Exploiting Hidden Parallelism of Non-Stencil Computation in High-Level Synthesis. DAC (2019)
Zhihe Yang, Mingjie Lin
Intelligent Fan System Based on Big Data and Artificial Intelligence. ICSAI (2019)
Yu Zou, Mingjie Lin
FAST: A Frequency-Aware Skewed Merkle Tree for FPGA-Secured Embedded Systems. ISVLSI (2019)
Mohammed Alawad, Mingjie Lin
Survey of Stochastic-Based Computation Paradigms. IEEE Trans. Emerg. Top. Comput. 7 (1) (2019)
Juan Escobedo, Mingjie Lin
Exploiting Irregular Memory Parallelism in Quasi-Stencils through Nonlinear Transformation. FCCM (2019)
Juan Escobedo, Mingjie Lin
Optimizing Order-Associative Kernel Computation with Joint Memory Banking and Data Reuse. FPGA (2019)
Mohammed Alawad, Yu Bai, Ronald F. DeMara, Mingjie Lin
Robust and Large-Scale Convolution through Stochastic-Based Processing without Multipliers. IEEE Trans. Emerg. Top. Comput. 7 (1) (2019)
Sayyed Jaffar Ali Raza, Mingjie Lin
Constructive Policy: Reinforcement Learning Approach for Connected Multi-Agent Systems. CASE (2019)
Shaahin Angizi, Zhezhi He, Yu Bai, Jie Han, Mingjie Lin, Ronald F. DeMara, Deliang Fan
Leveraging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Networks. ACM Great Lakes Symposium on VLSI (2018)
Juan Escobedo, Mingjie Lin
Extracting data parallelism in non-stencil kernel computing by optimally coloring folded memory conflict graph. DAC (2018)
Mohammed Alawad, Mingjie Lin
Scalable FPGA Accelerator for Deep Convolutional Neural Networks with Stochastic Streaming. IEEE Trans. Multi Scale Comput. Syst. 4 (4) (2018)
Juan Escobedo, Mingjie Lin
Graph-Theoretically Optimal Memory Banking for Stencil-Based Computing Kernels. FPGA (2018)
Yu Bai, Deliang Fan, Mingjie Lin
Stochastic-Based Synapse and Soft-Limiting Neuron with Spintronic Devices for Low Power and Robust Artificial Neural Networks. IEEE Trans. Multi Scale Comput. Syst. 4 (3) (2018)
Yu Zou, Mingjie Lin
Very Large-Scale and Node-Heavy Graph Analytics with Heterogeneous FPGA+CPU Computing Platform. ISVLSI (2018)
Stephen M. Williams, Mingjie Lin
Architecture and Circuit Design of an All-Spintronic FPGA. FPGA (2018)
Yu Zou, Mingjie Lin
GridGAS: An I/O-Efficient Heterogeneous FPGA+CPU Computing Platform for Very Large-Scale Graph Analytics. FPT (2018)
Mohammed Alawad, Mingjie Lin
Memory-Efficient Probabilistic 2-D Finite Impulse Response (FIR) Filter. IEEE Trans. Multi Scale Comput. Syst. 4 (1) (2018)
Yu Bai, Ronald F. DeMara, Jia Di, Mingjie Lin
Clockless Spintronic Logic: A Robust and Ultra-Low Power Computing Paradigm. IEEE Trans. Computers 67 (5) (2018)
Mohammed Alawad, Mingjie Lin
Stochastic-based multi-stage streaming realization of deep convolutional neural network. ISQED (2017)
Yu Bai, X. Sharon Hu, Ronald F. DeMara, Mingjie Lin
A Spin-Orbit Torque based Cellular Neural Network (CNN) Architecture. ACM Great Lakes Symposium on VLSI (2017)
Mohammed Alawad, Mingjie Lin
Stochastic-Based Multi-stage Streaming Realization of a Deep Convolutional Neural Network (Abstract Only). FPGA (2017)
Mohammed Alawad, Mingjie Lin
Sketching Computation with Stochastic Processing Engines. ACM J. Emerg. Technol. Comput. Syst. 13 (3) (2017)
Juan Escobedo, Mingjie Lin
Tessellating memory space for parallel access. ASP-DAC (2017)
Mohammed Alawad, Mingjie Lin
Stochastic-Based Convolutional Networks with Reconfigurable Logic Fabric (Abstract Only). FPGA (2016)
Juan Escobedo, Mingjie Lin
Tessellation-based multi-block memory mapping scheme for high-level synthesis with FPGA. FPT (2016)
Yu Bai, Mingjie Lin
Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device Technology (Abstract Only). FPGA (2016)
Faris S. Alghareb, Mingjie Lin, Ronald F. DeMara
Soft Error Effect Tolerant Temporal Self-Voting Checkers: Energy vs. Resilience Tradeoffs. ISVLSI (2016)
Mohammed Alawad, Mingjie Lin
Stochastic-Based Deep Convolutional Networks with Reconfigurable Logic Fabric. IEEE Trans. Multi Scale Comput. Syst. 2 (4) (2016)
Yu Bai, Bo Hu, Weidong Kuang, Mingjie Lin
Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall Devices. ACM Great Lakes Symposium on VLSI (2016)
Mohammed Alawad, Mingjie Lin
Stochastic-Based Convolutional Networks with Reconfigurable Logic Fabric. ISVLSI (2016)
Yu Bai, Mingjie Lin
Energy-Efficient Discrete Signal Processing with Field Programmable Analog Arrays (FPAAs). FPGA (2015)
Yu Bai, Mingjie Lin
Universal Random Number Generation with Field-Programmable Analog Array and Magnetic Tunneling Junction (MTJ) Devices. CIT/IUCC/DASC/PICom (2015)
Mingjie Lin, Shaoyi Cheng, Ronald F. DeMara, John Wawrzynek
ASTRO: Synthesizing application-specific reconfigurable hardware traces to exploit memory-level parallelism. Microprocess. Microsystems 39 (7) (2015)
Mohammed Alawad, Mingjie Lin
FIR Filter Based on Stochastic Computing with Reconfigurable Digital Fabric. FCCM (2015)
Abigail Fuentes-Rivera, Mingjie Lin, Hector M. Lugo-Cordero
Gabor filter polynomial approximation based on a novel evolutionary stochastic technique. MILCOM (2015)
Rizwan A. Ashraf, Ahmad Alzahrani, Navid Khoshavi, Ramtin Zand, Soheil Salehi, Arman Roohi, Mingjie Lin, Ronald F. DeMara
Reactive rejuvenation of CMOS logic paths using self-activating voltage domains. ISCAS (2015)
Mohammed Alawad, Mingjie Lin
Energy-Efficient High-Order FIR Filtering through Reconfigurable Stochastic Processing (Abstract Only). FPGA (2015)
Mohammed Alawad, Sinan Ismail, Mingjie Lin
Neural network-based fuzzy control surface implementation. GlobalSIP (2015)
Yu Bai, Mingjie Lin
Stochastically computing discrete Fourier transform with reconfigurable digital fabric. ReConFig (2014)
Yu Bai, Mohammed Alawad, Mingjie Lin
Optimally mitigating BTI-induced FPGA device aging with discriminative voltage scaling (abstract only). FPGA (2014)
Mohammed Alawad, Yu Bai, Ronald F. DeMara, Mingjie Lin
Energy-efficient multiplier-less discrete convolver through probabilistic domain transformation. FPGA (2014)
Yu Bai, Mohammed Alawad, Michael Riera, Mingjie Lin
Improving memory performance in reconfigurable computing architecture through hardware-assisted dynamic graph. ReConFig (2013)
Youfang Lin, Xuguang Jia, Mingjie Lin, Steve Gregory, Huaiyu Wan, Zhihao Wu
Inferring High Quality Co-Travel Networks CoRR (2013)
Yu Bai, Abigail Fuentes-Rivera, Mingjie Lin, Mike Riera
Exploiting algorithmic-level memory parallelism in distributed logic-memory architecture through hardware-assisted dynamic graph (abstract only). FPGA (2013)
Mingjie Lin, Shaoyi Cheng, John Wawrzynek
Extracting memory-level parallelism through reconfigurable hardware traces. ReConFig (2013)
Yu Bai, Abigail Fuentes-Rivera, Michael Riera, Mohammed Alawad, Mingjie Lin
Boosting Memory Performance of Many-Core FPGA Device through Dynamic Precedence Graph. FCCM (2013)
Ilia A. Lebedev, Christopher W. Fletcher, Shaoyi Cheng, James C. Martin, Austin Doupnik, Daniel Burke, Mingjie Lin, John Wawrzynek
Exploring Many-Core Design Templates for FPGAs and ASICs. Int. J. Reconfigurable Comput. 2012 (2012)
Shaoyi Cheng, Mingjie Lin, Hao Jun Liu, Simon Scott, John Wawrzynek
Exploiting Memory-Level Parallelism in Reconfigurable Accelerators. FCCM (2012)
Mingjie Lin, Yu Bai, John Wawrzynek
Selectively Fortifying Reconfigurable Computing Device to Achieve Higher Error Resilience. J. Electr. Comput. Eng. 2012 (2012)
Mingjie Lin, Yu Bai, John Wawrzynek
Discriminatively Fortified Computing with Reconfigurable Digital Fabric. HASE (2011)
Mingjie Lin, Shaoyi Cheng, John Wawrzynek
Using many-core architectural templates for FPGA-based computing (abstract only). FPGA (2011)
Mingjie Lin, Ilia A. Lebedev, John Wawrzynek
High-throughput bayesian computing machine with reconfigurable hardware. FPGA (2010)
Mingjie Lin, John Wawrzynek, Abbas El Gamal
Exploring FPGA Routing Architecture Stochastically. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (10) (2010)
Ilia A. Lebedev, Shaoyi Cheng, Austin Doupnik, James C. Martin, Christopher W. Fletcher, Daniel Burke, Mingjie Lin, John Wawrzynek
MARC: A Many-Core Approach to Reconfigurable Computing. ReConFig (2010)
Mingjie Lin, Shaoyi Cheng, John Wawrzynek
Cascading Deep Pipelines to Achieve High Throughput in Numerical Reduction Operations. ReConFig (2010)
Mingjie Lin, Yaling Ma
Scalable architecture for programmable quantum gate array (abstract only). FPGA (2010)
Mingjie Lin, John Wawrzynek
Improving FPGA Placement With Dynamically Adaptive Stochastic Tunneling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (12) (2010)
Mingjie Lin, Ilia A. Lebedev, John Wawrzynek
OpenRCL: Low-Power High-Performance Computing with Reconfigurable Devices. FPL (2010)
Mingjie Lin, Abbas El Gamal
A Low-Power Field-Programmable Gate Array Routing Fabric. IEEE Trans. Very Large Scale Integr. Syst. 17 (10) (2009)
Mingjie Lin, Yaling Ma
Base-Calling in DNA Pyrosequencing with Reconfigurable Bayesian Network. ReConFig (2009)
Mingjie Lin, Jianying Luo, Yaling Ma
A low-power monolithically stacked 3D-TCAM. ISCAS (2008)

Mingjie Lin.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Mingjie Lin