Hao Zheng

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 23

Top Topics

File Management

Spatial And Temporal

Top Venues

IEEE Trans. Sustain. Comput.

IEEE Trans. Parallel Distributed Syst.

Publications

Sven Thijssen, Muhammad Rashedul Haq Rashed, Hao Zheng, Sumit Kumar Jha, Rickard Ewetz
Towards Area-Efficient Path-Based In-Memory Computing using Graph Isomorphisms. ASPDAC (2024)
Jiaqi Yang, Hao Zheng, Ahmed Louri
Versa-DNN: A Versatile Architecture Enabling High-Performance and Energy-Efficient Multi-DNN Acceleration. IEEE Trans. Parallel Distributed Syst. 35 (2) (2024)
Md Hafizul Islam Chowdhuryy, Hao Zheng, Fan Yao
MetaLeak: Uncovering Side Channels in Secure Processor Architectures Exploiting Metadata. ISCA (2024)
Jiaqi Yang, Hao Zheng, Ahmed Louri
Aurora: A Versatile and Flexible Accelerator for Graph Neural Networks. IPDPS (2024)
Ke Wang, Hao Zheng, Jiajun Li, Ahmed Louri
Morph-GCNX: A Universal Architecture for High-Performance and Energy-Efficient Graph Convolutional Network Acceleration. IEEE Trans. Sustain. Comput. 9 (2) (2024)
Sanjay Gandham, Lingxiang Yin, Hao Zheng, Mingjie Lin
OCMGen: Extended Design Space Exploration with Efficient FPGA Memory Inference. FCCM (2023)
Sanjay Gandham, Lingxiang Yin, Hao Zheng, Mingjie Lin
SAGA: Sparsity-Agnostic Graph Convolutional Network Acceleration with Near-Optimal Workload Balance. ICCAD (2023)
Lingxiang Yin, Amir Ghazizadeh, Shilin Tian, Ahmed Louri, Hao Zheng
Polyform: A Versatile Architecture for Multi-DNN Execution via Spatial and Temporal Acceleration. ICCD (2023)
Lingxiang Yin, Amir Ghazizadeh, Ahmed Louri, Hao Zheng
ARIES: Accelerating Distributed Training in Chiplet-Based Systems via Flexible Interconnects. ICCAD (2023)
Jiajun Li, Yuxuan Zhang, Hao Zheng, Ke Wang
FDMAX: An Elastic Accelerator Architecture for Solving Partial Differential Equations. ISCA (2023)
Jiaqi Yang, Hao Zheng, Ahmed Louri
Venus: A Versatile Deep Neural Network Accelerator Architecture Design for Multiple Applications. DAC (2023)
Jia-Jun Li, Ke Wang, Hao Zheng, Ahmed Louri
GShuttle: Optimizing Memory Access Efficiency for Graph Convolutional Neural Network Accelerators. J. Comput. Sci. Technol. 38 (1) (2023)
Yuan Li, Ke Wang, Hao Zheng, Ahmed Louri, Avinash Karanth
Ascend: A Scalable and Energy-Efficient Deep Neural Network Accelerator With Photonic Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (7) (2022)
Hao Zheng, Ahmed Louri
Agile: A Learning-Enabled Power and Performance-Efficient Network-on-Chip Design. IEEE Trans. Emerg. Top. Comput. 10 (1) (2022)
Jiajun Li, Hao Zheng, Ke Wang, Ahmed Louri
SGCNAX: A Scalable Graph Convolutional Neural Network Accelerator With Workload Balancing. IEEE Trans. Parallel Distributed Syst. 33 (11) (2022)
Ke Wang, Hao Zheng, Yuan Li, Jiajun Li, Ahmed Louri
AGAPE: Anomaly Detection with Generative Adversarial Network for Improved Performance, Energy, and Security in Manycore Systems. DATE (2022)
Jiaqi Yang, Hao Zheng, Ahmed Louri
Adapt-Flow: A Flexible DNN Accelerator Architecture for Heterogeneous Dataflow Implementation. ACM Great Lakes Symposium on VLSI (2022)
Ke Wang, Hao Zheng, Yuan Li, Ahmed Louri
SecureNoC: A Learning-Enabled, High-Performance, Energy-Efficient, and Secure On-Chip Communication Framework Design. IEEE Trans. Sustain. Comput. 7 (3) (2022)
Hao Zheng, Ke Wang, Ahmed Louri
Adapt-NoC: A Flexible Network-on-Chip Design for Heterogeneous Manycore Architectures. HPCA (2021)
Hao Zheng, Ke Wang, Ahmed Louri
A Versatile and Flexible Chiplet-based System Design for Heterogeneous Manycore Architectures. DAC (2020)
Ke Wang, Hao Zheng, Ahmed Louri
TSA-NoC: Learning-Based Threat Detection and Mitigation for Secure Network-on-Chip Architecture. IEEE Micro 40 (5) (2020)
Hao Zheng, Ahmed Louri
An Energy-Efficient Network-on-Chip Design using Reinforcement Learning. DAC (2019)
Hao Zheng, Ahmed Louri
EZ-Pass: An Energy & Performance-Efficient Power-Gating Router Architecture for Scalable NoCs. IEEE Comput. Archit. Lett. 17 (1) (2018)