Ahmed Louri

ORCID

Publication Activity (10 Years)

Years Active: 1987-2024
Publications (10 Years): 69

Top Venues

IEEE Trans. Parallel Distributed Syst.

HPCA

IEEE Trans. Sustain. Comput.

IEEE Trans. Computers

Publications

Juliana Curry, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu
PCM Enabled Low-Power Photonic Accelerator for Inference and Training on Edge Devices. IPDPS (Workshops) (2024)
Yuan Li, Ahmed Louri, Avinash Karanth
A High-Performance and Energy-Efficient Photonic Architecture for Multi-DNN Acceleration. IEEE Trans. Parallel Distributed Syst. 35 (1) (2024)
Jiaqi Yang, Hao Zheng, Ahmed Louri
Versa-DNN: A Versatile Architecture Enabling High-Performance and Energy-Efficient Multi-DNN Acceleration. IEEE Trans. Parallel Distributed Syst. 35 (2) (2024)
Jiaqi Yang, Hao Zheng, Ahmed Louri
Aurora: A Versatile and Flexible Accelerator for Graph Neural Networks. IPDPS (2024)
Ke Wang, Hao Zheng, Jiajun Li, Ahmed Louri
Morph-GCNX: A Universal Architecture for High-Performance and Energy-Efficient Graph Convolutional Network Acceleration. IEEE Trans. Sustain. Comput. 9 (2) (2024)
Yuechen Chen, Ahmed Louri, Shanshan Liu, Fabrizio Lombardi
Slack-Aware Packet Approximation for Energy-Efficient Network-on-Chips. IEEE Trans. Sustain. Comput. 8 (1) (2023)
Lingxiang Yin, Amir Ghazizadeh, Shilin Tian, Ahmed Louri, Hao Zheng
Polyform: A Versatile Architecture for Multi-DNN Execution via Spatial and Temporal Acceleration. ICCD (2023)
Lingxiang Yin, Amir Ghazizadeh, Ahmed Louri, Hao Zheng
ARIES: Accelerating Distributed Training in Chiplet-Based Systems via Flexible Interconnects. ICCAD (2023)
Shanshan Liu, Pedro Reviriego, Anees Ullah, Ahmed Louri, Fabrizio Lombardi
Error-Resilient Data Compression With Tunstall Codes. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (5) (2023)
Kyle Shiflett, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri
Flumen: Dynamic Processing in the Photonic Interconnect. ISCA (2023)
Jiaqi Yang, Hao Zheng, Ahmed Louri
Venus: A Versatile Deep Neural Network Accelerator Architecture Design for Multiple Applications. DAC (2023)
Yuechen Chen, Shanshan Liu, Fabrizio Lombardi, Ahmed Louri
A Technique for Approximate Communication in Network-on-Chips for Image Classification. IEEE Trans. Emerg. Top. Comput. 11 (1) (2023)
Yuan Li, Ahmed Louri, Avinash Karanth
A Silicon Photonic Multi-DNN Accelerator. PACT (2023)
Jia-Jun Li, Ke Wang, Hao Zheng, Ahmed Louri
GShuttle: Optimizing Memory Access Efficiency for Graph Convolutional Neural Network Accelerators. J. Comput. Sci. Technol. 38 (1) (2023)
Yuan Li, Ke Wang, Hao Zheng, Ahmed Louri, Avinash Karanth
Ascend: A Scalable and Energy-Efficient Deep Neural Network Accelerator With Photonic Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (7) (2022)
Jiajun Li, Ahmed Louri
AdaPrune: An Accelerator-Aware Pruning Technique for Sustainable CNN Accelerators. IEEE Trans. Sustain. Comput. 7 (1) (2022)
Hao Zheng, Ahmed Louri
Agile: A Learning-Enabled Power and Performance-Efficient Network-on-Chip Design. IEEE Trans. Emerg. Top. Comput. 10 (1) (2022)
Jiajun Li, Hao Zheng, Ke Wang, Ahmed Louri
SGCNAX: A Scalable Graph Convolutional Neural Network Accelerator With Workload Balancing. IEEE Trans. Parallel Distributed Syst. 33 (11) (2022)
Ke Wang, Hao Zheng, Yuan Li, Jiajun Li, Ahmed Louri
AGAPE: Anomaly Detection with Generative Adversarial Network for Improved Performance, Energy, and Security in Manycore Systems. DATE (2022)
Yuan Li, Ahmed Louri, Avinash Karanth
SPRINT: A High-Performance, Energy-Efficient, and Scalable Chiplet-Based Accelerator With Photonic Interconnects for CNN Inference. IEEE Trans. Parallel Distributed Syst. 33 (10) (2022)
Yingnan Zhao, Ke Wang, Ahmed Louri
FSA: An Efficient Fault-tolerant Systolic Array-based DNN Accelerator Architecture. ICCD (2022)
Jiaqi Yang, Hao Zheng, Ahmed Louri
Adapt-Flow: A Flexible DNN Accelerator Architecture for Heterogeneous Dataflow Implementation. ACM Great Lakes Symposium on VLSI (2022)
Yuechen Chen, Ahmed Louri, Shanshan Liu, Fabrizio Lombardi
Approximate Network-on-Chips with Application to Image Classification. NAS (2022)
Yuan Li, Ahmed Louri, Avinash Karanth
SPACX: Silicon Photonics-based Scalable Chiplet Accelerator for DNN Inference. HPCA (2022)
Ke Wang, Hao Zheng, Yuan Li, Ahmed Louri
SecureNoC: A Learning-Enabled, High-Performance, Energy-Efficient, and Secure On-Chip Communication Framework Design. IEEE Trans. Sustain. Comput. 7 (3) (2022)
Xiaochen Tang, Shanshan Liu, Farzad Niknia, Pedro Reviriego, Ziheng Wang, Wei Tang, Ahmed Louri, Fabrizio Lombardi
A Delta Sigma Modulator-Based Stochastic Divider. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (8) (2022)
Yuan Li, Ahmed Louri
ALPHA: A Learning-Enabled High-Performance Network-on-Chip Router Design for Heterogeneous Manycore Architectures. IEEE Trans. Sustain. Comput. 6 (2) (2021)
Shanshan Liu, Ke Chen, Pedro Reviriego, Weiqiang Liu, Ahmed Louri, Fabrizio Lombardi
Reduced Precision Redundancy for Reliable Processing of Data. IEEE Trans. Emerg. Top. Comput. 9 (4) (2021)
Jiajun Li, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu
CSCNN: Algorithm-hardware Co-design for CNN Accelerators using Centrosymmetric Filters. HPCA (2021)
Hao Zheng, Ke Wang, Ahmed Louri
Adapt-NoC: A Flexible Network-on-Chip Design for Heterogeneous Manycore Architectures. HPCA (2021)
Yuan Li, Ahmed Louri, Avinash Karanth
Scaling Deep-Learning Inference with Chiplet-based Architecture and Photonic Interconnects. DAC (2021)
Jiajun Li, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu
GCNAX: A Flexible and Energy-efficient Accelerator for Graph Convolutional Neural Networks. HPCA (2021)
Kyle Shiflett, Avinash Karanth, Ahmed Louri, Razvan C. Bunescu
Bitwise Neural Network Acceleration Using Silicon Photonics. ACM Great Lakes Symposium on VLSI (2021)
Shanshan Liu, Xiaochen Tang, Farzad Niknia, Pedro Reviriego, Weiqiang Liu, Ahmed Louri, Fabrizio Lombardi
Stochastic Dividers for Low Latency Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (10) (2021)
Kyle Shiflett, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri
Albireo: Energy-Efficient Acceleration of Convolutional Neural Networks via Silicon Photonics. ISCA (2021)
Quintin Fettes, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri, Kyle Shiflett
Hardware-Level Thread Migration to Reduce On-Chip Data Movement Via Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (11) (2020)
Hao Zheng, Ke Wang, Ahmed Louri
A Versatile and Flexible Chiplet-based System Design for Heterogeneous Manycore Architectures. DAC (2020)
Ke Wang, Ahmed Louri
CURE: A High-Performance, Low-Power, and Reliable Network-on-Chip Design Using Reinforcement Learning. IEEE Trans. Parallel Distributed Syst. 31 (9) (2020)
Ke Wang, Hao Zheng, Ahmed Louri
TSA-NoC: Learning-Based Threat Detection and Mitigation for Secure Network-on-Chip Architecture. IEEE Micro 40 (5) (2020)
Kyle Shiflett, Dylan Wright, Avinash Karanth, Ahmed Louri
PIXEL: Photonic Neural Network Accelerator. HPCA (2020)
Yuechen Chen, Ahmed Louri
An Approximate Communication Framework for Network-on-Chips. IEEE Trans. Parallel Distributed Syst. 31 (6) (2020)
Mark Clark, Yingping Chen, Avinash Karanth, Dongsheng Brian Ma, Ahmed Louri
DozzNoC: Reducing Static and Dynamic Energy in NoCs with Low-latency Voltage Regulators using Machine Learning. IPDPS (2020)
Ahmed Louri
State of the Journal. IEEE Trans. Computers 69 (4) (2020)
Talha Furkan Canan, Savas Kaya, Avinash Karanth, Ahmed Louri
4-Input NAND and NOR Gates Based on Two Ambipolar Schottky Barrier FinFETs. ICECS (2020)
Yuechen Chen, Ahmed Louri
Learning-Based Quality Management for Approximate Communication in Network-on-Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (11) (2020)
Quintin Fettes, Mark Clark, Razvan C. Bunescu, Avinash Karanth, Ahmed Louri
Dynamic Voltage and Frequency Scaling in NoCs With Supervised and Reinforcement Learning Techniques. Computer 52 (9) (2019)
Ke Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu
IntelliNoC: a holistic design framework for energy-efficient and reliable on-chip communication for manycores. ISCA (2019)
Ke Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu
High-performance, Energy-efficient, Fault-tolerant Network-on-Chip Design Using Reinforcement Learnin. DATE (2019)
Ahmed Louri, Jacques Henri Collet, Avinash Karanth
Limit of Hardware Solutions for Self-Protecting Fault-Tolerant NoCs. ACM J. Emerg. Technol. Comput. Syst. 15 (1) (2019)
Ahmed Louri
Editorial from the Incoming Editor-in-Chief. IEEE Trans. Computers 68 (1) (2019)
Hao Zheng, Ahmed Louri
An Energy-Efficient Network-on-Chip Design using Reinforcement Learning. DAC (2019)
Yuechen Chen, Ahmed Louri
An online quality management framework for approximate communication in network-on-chips. ICS (2019)
Quintin Fettes, Mark Clark, Razvan C. Bunescu, Avinash Karanth, Ahmed Louri
Dynamic Voltage and Frequency Scaling in NoCs with Supervised and Reinforcement Learning Techniques. IEEE Trans. Computers 68 (3) (2019)
Dylan Machovec, Bhavesh Khemka, Nirmal Kumbhare, Sudeep Pasricha, Anthony A. Maciejewski, Howard Jay Siegel, Ali Akoglu, Gregory A. Koenig, Salim Hariri, Cihan Tunc, Michael Wright, Marcia Hilton, Rajendra Rambharos, Christopher Blandin, Farah Fargo, Ahmed Louri, Neena Imam
Utility-based resource management in an oversubscribed energy-constrained heterogeneous environment executing parallel applications. Parallel Comput. 83 (2019)
Avinash Karanth, Savas Kaya, Md. Ashif I. Sikder, Daniel Carbaugh, Soumyasanta Laha, Dominic DiTomaso, Ahmed Louri, Hao Xin, JunQiang Wu
Sustainability in Network-on-Chips by Exploring Heterogeneity in Emerging Technologies. IEEE Trans. Sustain. Comput. 4 (3) (2019)
Yuechen Chen, Md Farhadur Reza, Ahmed Louri
DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs. ICCD (2018)
Avinash Kodi, Kyle Shifflet, Savas Kaya, Soumyasanta Laha, Ahmed Louri
Scalable Power-Efficient Kilo-Core Photonic-Wireless NoC Architectures. IPDPS (2018)
Hao Zheng, Ahmed Louri
EZ-Pass: An Energy & Performance-Efficient Power-Gating Router Architecture for Scalable NoCs. IEEE Comput. Archit. Lett. 17 (1) (2018)
Yunus Kelestemur, Soumyasanta Laha, Savas Kaya, Avinash Kodi, Hao Xin, Ahmed Louri
Sub-THz Tunable Push-Push Oscillators with FinFETs for Wireless NoCs. MWSCAS (2018)
Mark Clark, Avinash Kodi, Razvan C. Bunescu, Ahmed Louri
LEAD: learning-enabled energy-aware dynamic voltage/frequency scaling in NoCs. DAC (2018)
Talha Furkan Canan, Savas Kaya, Avinash Kodi, Hao Xin, Ahmed Louri
10T and 8T Full Adders Based on Ambipolar XOR Gates with SB-FinFETs. ICECS (2018)
Scott Van Winkle, Avinash Karanth Kodi, Razvan C. Bunescu, Ahmed Louri
Extending the Power-Efficiency and Performance of Photonic Interconnects for Heterogeneous Multicores with Machine Learning. HPCA (2018)
Talha Furkan Canan, Savas Kaya, Avinash Kodi, Hao Xin, Ahmed Louri
Ultra-compact sub-10nm logic circuits based on ambipolar SB-FinFETs. MWSCAS (2017)
Dominic DiTomaso, Md. Ashif I. Sikder, Avinash Karanth Kodi, Ahmed Louri
Machine learning enabled power-aware Network-on-Chip design. DATE (2017)
Md. Ashif I. Sikder, Avinash Karanth Kodi, Ahmed Louri
Reconfigurable Optical and Wireless (R-OWN) Network-on-Chip for High Performance Computing. NANOCOM (2016)
Dominic DiTomaso, Travis Boraten, Avinash Kodi, Ahmed Louri
Dynamic error mitigation in NoCs using intelligent prediction techniques. MICRO (2016)
Wo-Tak Wu, Ahmed Louri
A Methodology for Cognitive NoC Design. IEEE Comput. Archit. Lett. 15 (1) (2016)
Pavan Poluri, Ahmed Louri
Shield: A Reliable Network-on-Chip Router Architecture for Chip Multiprocessors. IEEE Trans. Parallel Distributed Syst. 27 (10) (2016)
Tzyy-Juin Kao, Ahmed Louri
Design of high bandwidth photonic NoC architectures using optical multilevel signaling. NOCS (2016)
Md. Ashif I. Sikder, Avinash Karanth Kodi, Matthew Kennedy, Savas Kaya, Ahmed Louri
OWN: Optical and Wireless Network-on-Chip for Kilo-core Architectures. Hot Interconnects (2015)
Dominic DiTomaso, Avinash Karanth Kodi, Ahmed Louri, Razvan C. Bunescu
Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures. IEEE Trans. Computers 64 (12) (2015)
Pavan Poluri, Ahmed Louri
A Soft Error Tolerant Network-on-Chip Router Pipeline for Multi-Core Systems. IEEE Comput. Archit. Lett. 14 (2) (2015)
Dominic DiTomaso, Avinash Karanth Kodi, Ahmed Louri
QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers. HPCA (2014)
Pavan Poluri, Ahmed Louri
An Improved Router Design for Reliable On-Chip Networks. IPDPS (2014)
Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Roveda
Workload assignment considering NBTI degradation in multicore systems. ACM J. Emerg. Technol. Comput. Syst. 10 (1) (2014)
Randy Morris, Avinash Karanth Kodi, Ahmed Louri, Ralph D. Whaley
Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration. IEEE Trans. Computers 63 (1) (2014)
Randy Morris, Avinash Karanth Kodi, Ahmed Louri
Evaluating the scalability and performance of 3D stacked reconfigurable nanophotonic interconnects. SLIP (2013)
Dominic DiTomaso, Randy Morris, Evan Jolley, Ashwini Sarathy, Ahmed Louri, Avinash Karanth Kodi
Design of a Concentrated Torus Topology with Channel Buffers and Efficient Crossbars in NoCs. IPDPS Workshops (2013)
Dominic DiTomaso, Randy Morris, Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
Extending the Energy Efficiency and Performance With Channel Buffers, Crossbars, and Topology Analysis for Network-on-Chips. IEEE Trans. Very Large Scale Integr. Syst. 21 (11) (2013)
Pavan Poluri, Ahmed Louri
Tackling Permanent Faults in the Network-on-Chip Router Pipeline. SBAC-PAD (2013)
Randy Morris, Avinash Karanth Kodi, Ahmed Louri
Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance. MICRO (2012)
Randy Morris, Avinash Karanth Kodi, Ahmed Louri
3D-NoC: Reconfigurable 3D photonic on-chip interconnect for multicores. ICCD (2012)
Dominic DiTomaso, Travis Boraten, Avinash Kodi, Ahmed Louri
Evaluation of fault tolerant channel buffers for improving reliability in NoCs. MWSCAS (2012)
Ahmed Louri, Avinash Karanth Kodi
Introduction to the special issue on Networks-on-Chip (NoC) of the Journal of Parallel and Distributed Computing (JPDC). J. Parallel Distributed Comput. 71 (5) (2011)
Jacques Henri Collet, Ahmed Louri, Vivek Tulsidas Bhat, Pavan Poluri
ROBUST: a new self-healing fault-tolerant NoC router. NoCArc@MICRO (2011)
Avinash Karanth Kodi, Randy Morris, Dominic DiTomaso, Ashwini Sarathy, Ahmed Louri
Co-design of channel buffers and crossbar organizations in NoCs architectures. ICCAD (2011)
Ahmed Louri, Avinash Karanth Kodi
Special Issue on Network-on-Chips (NoCs). J. Parallel Distributed Comput. 70 (1) (2010)
Xiang Zhang, Ahmed Louri
A multilayer nanophotonic interconnection network for on-chip many-core communications. DAC (2010)
Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang
Workload capacity considering NBTI degradation in multi-core systems. ASP-DAC (2010)
Avinash Karanth Kodi, Randy Morris, Ahmed Louri, Xiang Zhang
On-Chip photonic interconnects for scalable multi-core architectures. NOCS (2009)
Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang
Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs). ISQED (2009)
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri, Janet Meiling Wang
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures. ASP-DAC (2009)
Jin Sun, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang
NBTI aware workload balancing in multi-core systems. ISQED (2009)
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis. IEEE Trans. Computers 57 (9) (2008)
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures. ISCA (2008)
Avinash Karanth Kodi, Ahmed Louri
Optisim: A System Simulation Methodology for Optically Interconnected HPC Systems. IEEE Micro 28 (5) (2008)
Chander Kochar, Avinash Karanth Kodi, Ahmed Louri
Implementation of Dynamic Bandwidth Re-allocation in Optical Interconnects using Microring Resonators. Hot Interconnects (2007)
Avinash Karanth Kodi, Ahmed Louri
Power-Aware Bandwidth-Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems. IPDPS (2007)
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture. ANCS (2007)
Avinash Karanth Kodi, Ahmed Louri
Performance adaptive power-aware reconfigurable optical interconnects for high-performance computing (HPC) systems. SC (2007)

Ahmed Louri.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Ahmed Louri