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iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures.
Avinash Karanth Kodi
Ashwini Sarathy
Ahmed Louri
Published in:
ISCA (2008)
Keyphrases
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network on chip
routing algorithm
network simulator
multi processor
interconnection networks
packet switched
data transfer
energy consumption
routing protocol
fault tolerant
shared memory
cmos technology
multipath
power dissipation
multi core processors