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Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration.
Randy Morris
Avinash Karanth Kodi
Ahmed Louri
Ralph D. Whaley
Published in:
IEEE Trans. Computers (2014)
Keyphrases
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network on chip
three dimensional
multi processor
routing algorithm
network simulator
packet switched
data transfer
real time
ad hoc networks
fault tolerant
program execution
sensor networks
routing protocol
power consumption