Masahiro Ishida

Publication Activity (10 Years)

Years Active: 1991-2021
Publications (10 Years): 14

Top Topics

Special Session

Schottky Barrier

Camera Pose Estimation

Top Venues

J. Electron. Test.

Publications

Shogo Katayama, Yudai Abe, Anna Kuwana, Koji Asami, Masahiro Ishida, Ryuya Ohta, Haruo Kobayashi
Application of Residue Sampling to RF/AMS Device Testing. ATS (2021)
Kiyotaka Ichiyama, Takashi Kusaka, Masahiro Ishida
A Jitter Injection Module for Production Test of 52-Gbps PAM4 Signal Interfaces. ITC (2019)
Naoki Terao, Toru Nakura, Masahiro Ishida, Rimon Ikeno, Takashi Kusaka, Tetsuya Iizuka, Kunihiro Asada
Digitally-Controlled Compensation Current Injection to ATE Power Supply for Emulation of Customer Environment. J. Electron. Test. 34 (2) (2018)
Kiyotaka Ichiyama, Takashi Kusaka, Masahiro Ishida
A Stressed Eye Testing Module for Production Test of 30-Gbps NRZ Signal Interfaces. ITC (2018)
Naoki Terao, Toru Nakura, Masahiro Ishida, Rimon Ikeno, Takashi Kusaka, Tetsuya Iizuka, Kunihiro Asada
Extension of power supply impedance emulation method on ATE for multiple power domain. ETS (2017)
Masahiro Ishida, Kiyotaka Ichiyama
A jitter separation and BER estimation method for asymmetric total jitter distributions. ITC (2017)
Kazumi Hatayama, Masahiro Ishida
Innovative practices session 10B innovative practices in Asia-2: From cost perspective. VTS (2017)
Kazumi Hatayama, Masahiro Ishida
Innovative practices session 9B innovative practices in Asia-1: From quality perspective. VTS (2017)
Masahiro Ishida, Kiyotaka Ichiyama
An ATE System for Testing RF Digital Communication Devices With QAM Signal Interfaces. IEEE Des. Test 33 (6) (2016)
Masahiro Ishida, Toru Nakura, Takashi Kusaka, Satoshi Komatsu, Kunihiro Asada
Power Supply Voltage Control for Eliminating Overkills and Underkills in Delay Fault Testing. IEICE Trans. Electron. (10) (2016)
Shinji Ujita, Yusuke Kinoshita, Hidekazu Umeda, Tatsuo Morita, Kazuhiro Kaibara, Satoshi Tamura, Masahiro Ishida, Tetsuzo Ueda
A fully integrated GaN-based power IC including gate drivers for high-efficiency DC-DC Converters. VLSI Circuits (2016)
Kazuki Shirahata, Takeshi Mizushima, Tasuku Fujibe, Hidenobu Matsumura, Tomoyuki Itakura, Masahiro Ishida, Daisuke Watanabe, Shin Masuda
An Optical Interconnection Test Method Applicable to 100-Gb/s Transceivers Using an ATE Based Hardware. ATS (2016)
Masahiro Ishida, Toru Nakura, Takashi Kusaka, Satoshi Komatsu, Kunihiro Asada
Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills in Device Testing. J. Electron. Test. 32 (3) (2016)
Toru Nakura, Naoki Terao, Masahiro Ishida, Rimon Ikeno, Takashi Kusaka, Tetsuya Iizuka, Kunihiro Asada
Power supply impedance emulation to eliminate overkills and underkills due to the impedance difference between ATE and customer board. ITC (2016)
Takaaki Ibuchi, Tsuyoshi Funaki, Shinji Ujita, Masahiro Ishida, Tetsuzo Ueda
Conducted noise of GaN Schottky barrier diode in a DC-DC converter. IEICE Electron. Express 12 (24) (2015)
Masahiro Ishida, Toru Nakura, Akira Matsukawa, Rimon Ikeno, Kunihiro Asada
A Technique for Analyzing On-Chip Power Supply Impedance. ATS (2015)
Masahiro Ishida, Kiyotaka Ichiyama
An ATE system for testing 2.4-GHz RF digital communication devices with QAM signal interfaces. ITC (2015)
Takahiro J. Yamaguchi, Katsuhiko Degawa, Masayuki Kawabata, Masahiro Ishida, Koichiro Uekusa, Mani Soma
A new method for measuring alias-free aperture jitter in an ADC output. ITC (2015)
Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Terri S. Fiez, Mike Peng Li
Special session 8C: Hot topic: Designers' and test researchers' roles in analog design-for-test. VTS (2014)
Shuichi Nagai, Yasuhiro Yamada, Noboru Negoro, Hiroyuki Handa, Yuji Kudoh, Hiroaki Ueno, Masahiro Ishida, Nobuyuki Otuska, Daisuke Ueda
30.5 A GaN 3×3 matrix converter chipset with Drive-by-Microwave technologies. ISSCC (2014)
Jose Moreira, Hubert Werkmann, Masahiro Ishida, Bernhard Roth, Volker Filsinger, Sui-Xia Yang
An ATE Based 32 Gbaud PAM-4 At-Speed Characterization and Testing Solution. ATS (2014)
Masahiro Ishida, Takashi Kusaka, Toru Nakura, Satoshi Komatsu, Kunihiro Asada
Statistical silicon results of dynamic power integrity control of ATE for eliminating overkills and underkills. ITC (2014)
Kiyotaka Ichiyama, Masahiro Ishida, Kenichi Nagatani, Toshifumi Watanabe
A functional test of 2-GHz/4-GHz RF digital communication device using digital tester. ITC (2013)
Masahiro Ishida, Kiyotaka Ichiyama, Tasuku Fujibe, Daisuke Watanabe, Masayuki Kawabata
Real-Time Testing Method for Multilevel Signal Interfaces and Its Impact on Test Cost. IEEE Des. Test Comput. 29 (5) (2012)
Masahiro Ishida, Kiyotaka Ichiyama, Daisuke Watanabe, Masayuki Kawabata, Toshiyuki Okayasu
Real-time testing method for 16 Gbps 4-PAM signal interface. ITC (2012)
Kiichi Niitsu, Takahiro J. Yamaguchi, Masahiro Ishida, Haruo Kobayashi
Post-Silicon Jitter Measurements. Asian Test Symposium (2012)
Masahiro Ishida, Toru Nakura, Toshiyuki Kikkawa, Takashi Kusaka, Satoshi Komatsu, Kunihiro Asada
Power integrity control of ATE for emulating power supply fluctuations on customer environment. ITC (2012)
Masahiro Ishida, Kazuhiro Shimonomura
Marker based camera pose estimation for underwater robots. SII (2012)
Masahiro Ishida, Kiyotaka Ichiyama, Daisuke Watanabe, Masayuki Kawabata, Toshiyuki Okayasu
Real-time testing method for 16 Gbps 4-PAM signal interface. ITC (2011)
Takahiro J. Yamaguchi, Kiyotaka Ichiyama, X. H. Hou, Masahiro Ishida
A robust method for identifying a deterministic jitter model in a total jitter distribution. ITC (2009)
Takahiro J. Yamaguchi, Masahiro Ishida
Total Jitter Measurement for Testing HSIO Integrated SoCs. ATS (2008)
Takahiro J. Yamaguchi, Masayuki Kawabata, Mani Soma, Masahiro Ishida, K. Sawami, Koichiro Uekusa
A New Method for Measuring Aperture Jitter in ADC Output and Its Application to ENOB Testing. ITC (2008)
Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
Data jitter measurement using a delta-time-to-voltage converter method. ITC (2007)
Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
Mismatch-Tolerant Circuit for On-Chip Measurements of Data Jitter. CICC (2007)
Takahiro J. Yamaguchi, H. X. Hou, Koji Takayama, Dave Armstrong, Masahiro Ishida, Mani Soma
An FFT-based jitter separation method for high-frequency jitter testing with a 10x reduction in test time. ITC (2007)
Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter. ISCAS (2007)
Takahiro J. Yamaguchi, Satoshi Iwamoto, Masahiro Ishida, Mani Soma
A Study of Per-Pin Timing Jitter Scope. ITC (2006)
Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
A Real-Time Delta-Time-to-Voltage Converter for Clock Jitter Measurement. ITC (2006)
Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma
A wideband low-noise ATE-based method for measuring jitter in GHz signals. ITC (2005)
Takahiro J. Yamaguchi, Masahiro Ishida, Kiyotaka Ichiyama, Mani Soma, Christian Krawinkel, Katsuaki Ohsawa, Masao Sugai
A Real-Time Jitter Measurement Board for High-Performance Computer and Communication Systems. ITC (2004)
Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
Skew measurements in clock distribution circuits using an analytic signal method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (7) (2004)
Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Toshifumi Watanabe, Tadahiro Ohmi
Extraction of instantaneous and RMS sinusoidal jitter using an analytic signal method. IEEE Trans. Circuits Syst. II Express Briefs 50 (6) (2003)
Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha
Timing Jitter Measurement of Intrinsic Random Jitter and Sinusoidal Jitter Using Frequency Division. J. Electron. Test. 19 (2) (2003)
Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Makoto Kurosawa, Hirobumi Musha
Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements. ITC (2003)
Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha
Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division. VTS (2002)
Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Hirobumi Musha
Effects of Amplitude Modulation in Jitter Tolerance Measurements of Communication Devices. Asian Test Symposium (2002)
Takahiro J. Yamaguchi, Dong Sam Ha, Masahiro Ishida, Tadahiro Ohmi
A Method for Compressing Test Data Based on Burrows-Wheeler Transformation. IEEE Trans. Computers 51 (5) (2002)
Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie
A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter. ITC (2002)
Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen
A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals. VTS (2001)
Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
Testing clock distribution circuits using an analytic signal method. ITC (2001)
Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Toshifumi Watanabe, Tadahiro Ohmi
Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method. VTS (2000)
Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe
microprocessor using an analytic signal method. ITC (2000)
Masahiro Ishida, Dong Sam Ha, Takahiro J. Yamaguchi
COMPACT: A Hybrid Method for Compressing Test Data. VTS (1998)
Takahiro J. Yamaguchi, Masahiro Ishida, Marco Tilgner, Dong Sam Ha
An Efficient Method for Compressing Test Data. ITC (1997)
M. Kanzaki, Masahiro Ishida
Programming for Parallel Pattern Generators. ITC (1991)