Rajesh Raina

Publication Activity (10 Years)

Years Active: 1996-2008
Publications (10 Years): 0

Publications

Rajesh Raina
Achieving Zero-Defects for Automotive Applications. ITC (2008)
Rajesh Raina
What is DFM & DFY and Why Should I Care ? ITC (2006)
Rajesh Raina
Have we overcome the challenges associated with SoC and multi-core testing? ITC (2005)
Rajesh Raina
Is the concern for soft-error overblown? ITC (2005)
Rajesh Raina
Have we overcome the challenges associated with SoC and multi-core testing? ITC (2005)
Rajesh Raina
Is the concern for soft-error overblown? ITC (2005)
Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
Skew measurements in clock distribution circuits using an analytic signal method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (7) (2004)
Dawit Belete, Ashutosh Razdan, William Schwarz, Rajesh Raina, Christopher Hawkins, Jeff Morehead
Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor . ITC (2002)
Robert Bailey, A. Metayer, B. Svrcek, Nandu Tendolkar, E. Wolf, Eric Fiene, Mike Alexander, Rick Woltenberg, Rajesh Raina
Test Methodology for Motorola's High Performance e500 Core Based on PowerPC Instruction Set Architecture. ITC (2002)
Mani Soma, Welela Haileselassie, Jessica Yan, Rajesh Raina
A Wavelet-Based Timing Parameter Extraction Method. ITC (2002)
John Gatej, Lee Song, Carol Pyron, Rajesh Raina, Tom Munns
valuating ATE Features in Terms of Test Escape Rates and Other Cost of Test Culprits. ITC (2002)
Nandu Tendolkar, Rajesh Raina, Rick Woltenberg, Xijiang Lin, Bruce Swanson, Greg Aldrich
Novel Techniques for Achieving High At-Speed Transition Fault Test Coverage for Motorola's Microprocessors Based on PowerPC(tm) Instruction Set Architecture. VTS (2002)
Jay Bedsole, Rajesh Raina, Al Crouch, Magdy S. Abadir
Very Low Cost Testers: Opportunities and Challenges. IEEE Des. Test Comput. 18 (5) (2001)
Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen
A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals. VTS (2001)
Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
Testing clock distribution circuits using an analytic signal method. ITC (2001)
Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe
microprocessor using an analytic signal method. ITC (2000)
Rajesh Raina, Robert Bailey, Dawit Belete, Vikram Khosa, Robert F. Molyneaux, Javier Prado, Ashutosh Razdan
microprocessor. ITC (2000)
Nandu Tendolkar, Robert F. Molyneaux, Carol Pyron, Rajesh Raina
At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor. VTS (2000)
Carol Pyron, Mike Alexander, James Golab, George Joos, Bruce Long, Robert F. Molyneaux, Rajesh Raina, Nandu Tendolkar
DFT advances in the Motorola's MPC7400, a PowerPC G4 microprocessor. ITC (1999)
Magdy S. Abadir, Rajesh Raina
Design-for-test methodology for Motorola PowerPC microprocessors. ITC (1999)
Rajesh Raina, Robert F. Molyneaux
Random Self-Test Method - Applications on PowerPC (tm) Microprocessor Caches. Great Lakes Symposium on VLSI (1998)
Rajesh Raina, Charles Njinda, Robert F. Molyneaux
How Seriously Do You Take Your Possible-Detect Faults? ITC (1997)
Rajesh Raina, Robert Bailey, Charles Njinda, Robert F. Molyneaux, Charlie Beh
Efficient Testing of Clock Regenerator Circuits in Scan Designs. DAC (1997)
James Monaco, David Holloway, Rajesh Raina
Functional Verification Methodology for the PowerPC 604 Microprocessor. DAC (1996)