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Novel Techniques for Achieving High At-Speed Transition Fault Test Coverage for Motorola's Microprocessors Based on PowerPC(tm) Instruction Set Architecture.

Nandu TendolkarRajesh RainaRick WoltenbergXijiang LinBruce SwansonGreg Aldrich
Published in: VTS (2002)
Keyphrases
  • achieving high
  • instruction set
  • test suite
  • information systems
  • instruction set architecture
  • real time
  • operating system
  • query processing
  • low cost
  • fault diagnosis
  • floating point