David C. Keezer

Publication Activity (10 Years)

Years Active: 1985-2024
Publications (10 Years): 11

Top Topics

Signal Acquisition

Hierarchically Structured

Malicious Executables

Top Venues

J. Electron. Test.

Publications

David C. Keezer, Dany Minier, Hongjie Li
Characterization of Ultra-low Random Jitter Reduction Methods up to 36 GHz. ETS (2024)
David C. Keezer, Dany Minier, Hongjie Li
Experimental Evaluation of Jitter Reduction Methods for Multi-Gigahertz Test. ITC-Asia (2023)
Thomas Moon, Hyun Woo Choi, David C. Keezer, Abhijit Chatterjee
Efficient Built-In Test and Calibration of High Speed Serial I/O Systems Using Monobit Signal Acquisition. J. Electron. Test. 35 (6) (2019)
Jingchi Yang, David C. Keezer
A Framework for Design of Self-Repairing Digital Systems. ITC (2019)
Taimour Wehbe, Vincent John Mooney, David C. Keezer
A chip-level security framework for assessing sensor data integrity: work-in-progress. CODES+ISSS (2018)
Taimour Wehbe, Vincent John Mooney, Omer T. Inan, David C. Keezer
Securing Medical Devices Against Hardware Trojan Attacks Through Analog-, Digital-, and Physiological-Based Signatures. J. Hardw. Syst. Secur. 2 (3) (2018)
Taimour Wehbe, Vincent John Mooney III, David C. Keezer
Hardware-Based Run-Time Code Integrity in Embedded Devices. Cryptogr. 2 (3) (2018)
David C. Keezer, Jingchi Yang
Biologically inspired hierarchical structure for self-repairing FPGAs. ReConFig (2017)
Taimour Wehbe, Vincent John Mooney, David C. Keezer, Omer T. Inan, Abdul Qadir Javaid
Use of Analog Signatures for Hardware Trojan Detection. FPGAworld (2017)
Te-Hui Chen, David C. Keezer
A 40Gbps economic extension board and FPGA-based testing platform. ETS (2016)
Te-Hui Chen, David C. Keezer
An Ultra-High-Speed Test Module and FPGA-Based Development Platform. ATS (2016)
Taimour Wehbe, Vincent John Mooney, David C. Keezer, Nicholas B. Parham
A Novel Approach to Detect Hardware Trojan Attacks on Primary Data Inputs. WESS (2015)
David C. Keezer, Te-Hui Chen, Thomas Moon, D. T. Stonecypher, Abhijit Chatterjee, Hyun Woo Choi, Sungyeol Kim, Hosun Yoo
An FPGA-based ATE extension module for low-cost multi-GHz memory test. ETS (2015)
Thomas Moon, Hyun Woo Choi, David C. Keezer, Abhijit Chatterjee
Multi-channel testing architecture for high-speed eye-diagram using pin electronics and subsampling monobit reconstruction algorithms. VTS (2014)
Aderinola Gbade-Alabi, David C. Keezer, Vincent John Mooney, Axel York Poschmann, Marc Stöttinger, Kshitij Divekar
A signature based architecture for Trojan detection. WESS (2014)
David C. Keezer, Carl Edward Gray, Te-Hui Chen, Ashraf Majid
Practical methods for extending ATE to 40 and 50Gbps. ITC (2013)
Suvadeep Banerjee, Hyun Woo Choi, David C. Keezer, Abhijit Chatterjee
Enhanced Resolution Time-Domain Reflectometry for High Speed Channels: Characterizing Spatial Discontinuities with Non-ideal Stimulus. Asian Test Symposium (2013)
Satyanarayana Telikepalli, Madhavan Swaminathan, David C. Keezer
Minimizing simultaneous switching noise at reduced power with constant-voltage power transmission lines for high-speed signaling. ISQED (2013)
Hsiu-Ming (Sherman) Chang, David C. Keezer
Guest Editorial: Special Issue on Analog, Mixed-Signal, RF, and MEMS Testing. J. Electron. Test. 28 (5) (2012)
David C. Keezer, Te-Hui Chen, Carl Edward Gray, Hyun Woo Choi, Sungyeol Kim, Seongkwan Lee, Hosun Yoo
Multi-gigahertz arbitrary timing generator and data pattern serializer/formatter. ITC (2012)
Carl Edward Gray, David C. Keezer
Extending a DWDM Optical Network Test System to 12 Gbps x4 Channels. J. Electron. Test. 27 (3) (2011)
Carl Gray, David C. Keezer, Howard Wang, Keren Bergman
Burst-Mode Transmission and Data Recovery for Multi-GHz Optical Packet Switching Network Testing. Asian Test Symposium (2011)
David C. Keezer, Carl Edward Gray
Two methods for 24 Gbps test signal synthesis. DATE (2011)
A. M. Majid, David C. Keezer
Multi-function multi-GHz ATE extension using state-of-the-art FPGAs. ITC (2011)
A. M. Majid, David C. Keezer
Stretching the limits of FPGA SerDes for enhanced ATE performance. DATE (2010)
David C. Keezer, Carl Gray, Dany Minier, Patrice Ducharme
Low-Cost 20 Gbps Digital Test Signal Synthesis Using SiGe and InP Logic. J. Electron. Test. 26 (1) (2010)
Marcus Dutton, David C. Keezer
An architecture for graphics processing in an FPGA (abstract only). FPGA (2010)
David C. Keezer, Carl Gray, A. M. Majid, Dany Minier, Patrice Ducharme
A development platform and electronic modules for automated test up to 20 Gbps. ITC (2009)
David C. Keezer, Dany Minier, Patrice Ducharme
Variable Delay of Multi-Gigahertz Digital Signals for Deskew and Jitter-Injection Test Applications. DATE (2008)
David C. Keezer, Dany Minier, Patrice Ducharme, A. M. Majid
An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test. ITC (2008)
David C. Keezer, Dany Minier, Patrice Ducharme, Doris Viens, Greg Flynn, John McKillop
MEMS Switches and SiGe Logic for Multi-GHz Loopback Testing. VLSI Design 2008 (2008)
David C. Keezer, Dany Minier, Patrice Ducharme
Method for reducing jitter in multi-gigahertz ATE. DATE (2007)
David C. Keezer, Dany Minier, Patrice Ducharme, Doris Viens, Greg Flynn, John McKillop
Multi-GHz loopback testing using MEMs switches and SiGe logic. ITC (2007)
David C. Keezer, Carl Gray, Ashraf M. Majid, Nafeez Taher
Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL CoRR (2007)
Carl Edward Gray, Odile Liboiron-Ladouceur, David C. Keezer, Keren Bergman
Co-development of test electronics and PCI Express interface for a multi-Gbps optical switching network. ITC (2007)
A. M. Majid, David C. Keezer, Jayasanker Jayabalan, Mihai Rotaru
Multi-Gigahertz Testing of Wafer-Level Packaged Devices. ITC (2006)
David C. Keezer, Dany Minier, Patrice Ducharme
Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. IEEE Des. Test Comput. 23 (1) (2006)
David C. Keezer, Carl Gray, Ashraf Majid, Nafeez Taher
Implementing multi-gigahertz test systems using CMOS FPGAs and PECL components. ESSCIRC (2005)
David C. Keezer, Carl Gray, Ashraf M. Majid, Nafeez Taher
Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL. DATE (2005)
A. M. Majid, David C. Keezer, J. V. Karia
A 5 Gbps Wafer-Level Tester. Asian Test Symposium (2005)
David C. Keezer, Dany Minier, F. Binette
Modular Extension of ATE to 5 Gbps. ITC (2004)
David C. Keezer, Dany Minier, Marie-Christine Caron
Multiplexing ATE Channels for Production Testing at 2.5 Gbps. IEEE Des. Test Comput. 21 (4) (2004)
J. S. Davis, David C. Keezer, Odile Liboiron-Ladouceur, Keren Bergman
Application and Demonstration of a Digital Test Core: Optoelectronic Test Bed and Wafer-level Prober. ITC (2003)
David C. Keezer, Dany Minier, Marie-Christine Caron
A Production-Oriented Multiplexing System for Testing above 2.5 Gbps. ITC (2003)
Karim Arabi, Klaus-Dieter Hilliges, David C. Keezer, Sassan Tabatabaei
Multi-GigaHertz Testing Challenges and Solutions. VTS (2002)
David C. Keezer
Challenges and Solutions for Multi-Gigahertz Testing. ITC (2002)
J. S. Davis, David C. Keezer
Multi-Purpose Digital Test Core Utilizing Programmable Logic. ITC (2002)
David C. Keezer, Q. Zhou, C. Bair, J. Kuan, B. Poole
Terabit-per-second automated digital testing. ITC (2001)
David C. Keezer, Q. Zhou
Test support processors for enhanced testability of high performance circuits. ITC (1999)
David C. Keezer, K. E. Newman, J. S. Davis
Improved sensitivity for parallel test of substrate interconnections. ITC (1998)
David C. Keezer, Q. Zhou
Alternative interface methods for testing high speed bidirectional signals. ITC (1998)
Bruce C. Kim, David C. Keezer, Abhijit Chatterjee
A high throughput test methodology for MCM substrates. ITC (1998)
K. E. Newman, David C. Keezer
A Low-Cost Massively-Parallel Interconnect Test Method for MCM Substrates. ITC (1997)
David C. Keezer, R. J. Wenzel
Low-Cost ATE PinElectronics for Multigigabit-per-Second At-Speed Test. ITC (1997)
David C. Keezer
Electrical Troubleshooting, Diagnostics, and Repair of Multichip Modules. ITC (1995)
N. Ranganathan, Raghu Sastry, Raguveer Venkatesan, Joseph W. Yoder, David C. Keezer
SMAC: A Scene Matching Chip. ICCD (1993)
David C. Keezer
Known Godd Die for MCMs: Enabling Technologies. ITC (1993)
Vijay K. Jain, Hiroomi Hikawa, David C. Keezer
An Architecture for WSI Rapid Prototyping. Computer 25 (4) (1992)
David C. Keezer, R. J. Wenzel
Calibration Techniques for a Gigahertz Test System. ITC (1992)
David C. Keezer
MCM Test Using Available Technology. ITC (1992)
Vijay K. Jain, David L. Landis, David C. Keezer, K. T. Wilson, D. Whittaker
Wafer Scale Integration: A university perspective. J. VLSI Signal Process. 2 (4) (1991)
S. P. Athan, David C. Keezer, J. McKinley
High Frequency Wafer Probing and Power Supply Resonance Effects. ITC (1991)
David C. Keezer
Real-Time Data Comparison for GigaHertz Digital Test. ITC (1991)
David C. Keezer
Multiplexing test system channels for data rates above 1 Gb/s. ITC (1990)
L. J. Falkenstrom, David C. Keezer, A. Patterson, Robert M. Rolfe, J. Wolcott
Tester Independent Support Software System (TISSS). ITC (1985)