Vladimir Zolotov

Publication Activity (10 Years)

Years Active: 2000-2021
Publications (10 Years): 7

Top Topics

Random Variables

Order Statistics

Mixed Integer Linear Program

Top Venues

Publications

Ruchir Puri, David S. Kung, Geert Janssen, Wei Zhang, Giacomo Domeniconi, Vladimir Zolotov, Julian Dolby, Jie Chen, Mihir R. Choudhury, Lindsey Decker, Veronika Thost, Luca Buratti, Saurabh Pujar, Shyam Ramji, Ulrich Finkler, Susan Malaika, Frederick Reiss
CodeNet: A Large-Scale AI for Code Dataset for Learning a Diversity of Coding Tasks. NeurIPS Datasets and Benchmarks (2021)
Ruchir Puri, David S. Kung, Geert Janssen, Wei Zhang, Giacomo Domeniconi, Vladimir Zolotov, Julian Dolby, Jie Chen, Mihir R. Choudhury, Lindsey Decker, Veronika Thost, Luca Buratti, Saurabh Pujar, Ulrich Finkler
Project CodeNet: A Large-Scale AI for Code Dataset for Learning a Diversity of Coding Tasks. CoRR (2021)
Geert Janssen, Vladimir Zolotov, Tung D. Le
Large Data Flow Graphs in Limited GPU Memory. IEEE BigData (2019)
Vladimir Zolotov, David Kung
Analysis and Optimization of fastText Linear Text Classifier. CoRR (2017)
Debjit Sinha, Vladimir Zolotov, Sheshashayee K. Raghunathan, Michael H. Wood, Kerim Kalafala
Practical statistical static timing analysis with current source models. DAC (2016)
Debjit Sinha, Vladimir Zolotov, Jin Hu, Sheshashayee K. Raghunathan, Adil Bhanji, Christine M. Casey
Generation and use of statistical timing macro-models considering slew and load variability. ICCAD (2016)
Debjit Sinha, Vladimir Zolotov, Eric Fluhr, Michael H. Wood, Jeffrey Ritzinger, Natesan Venkateswaran, Stephen Shuma
Sharing and Re-use of Statistical Timing Macro-Models across Multiple Voltage Domains. VLSI Design (2016)
Vladimir Zolotov, Peter Feldmann
Variation aware cross-talk aggressor alignment by mixed integer linear programming. DAC (2015)
Yiyu Shi, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah
Order statistics for correlated random variables and its application to at-speed testing. ACM Trans. Design Autom. Electr. Syst. 18 (3) (2013)
Vladimir Zolotov, Debjit Sinha, Jeffrey G. Hemmett, Eric A. Foreman, Chandu Visweswariah, Jinjun Xiong, Jeremy Leitzen, Natesan Venkateswaran
Timing analysis with nonseparable statistical and deterministic variations. DAC (2012)
Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham
Path Criticality Computation in Parameterized Statistical Timing Analysis Using a Novel Operator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (4) (2012)
Debjit Sinha, Chandu Visweswariah, Natesan Venkateswaran, Jinjun Xiong, Vladimir Zolotov
operation: concept and applications to timing. DAC (2012)
Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham
Testability-Driven Statistical Path Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (8) (2012)
Vladimir Zolotov, Jinjun Xiong
Optimal statistical chip disposition. ICCAD (2011)
Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham
Testability driven statistical path selection. DAC (2011)
Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham
Path criticality computation in parameterized statistical timing analysis. ASP-DAC (2011)
Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu
Transistor sizing of custom high-performance digital circuits with parametric yield considerations. DAC (2010)
Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chandu Visweswariah
Statistical Path Selection for At-Speed Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (5) (2010)
Vladimir Zolotov, Chandu Visweswariah, Jinjun Xiong
Voltage binning under process variation. ICCAD (2009)
Jiniun Xionq, Yiyu Shi, Vladimir Zolotov, Chandu Visweswariah
Pre-ATPG path selection for near optimal post-ATPG process space coverage. ICCAD (2009)
Howard Chen, Scott Neely, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah
Statistical Power Analysis for High-Performance Processors. J. Low Power Electron. 5 (1) (2009)
Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah, Peter A. Habitz
Optimal Test Margin Computation for At-Speed Structural Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (9) (2009)
Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov
Statistical ordering of correlated timing quantities and its application for path ranking. DAC (2009)
Jinjun Xiong, Yiyu Shi, Vladimir Zolotov, Chandu Visweswariah
Statistical multilayer process space coverage for at-speed test. DAC (2009)
Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chandu Visweswariah
Statistical path selection for at-speed test. ICCAD (2008)
Howard Chen, Scott Neely, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah
Statistical Modeling and Analysis of Static Leakage and Dynamic Switching Power. PATMOS (2008)
Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah
Incremental Criticality and Yield Gradients. DATE (2008)
Ruiming Chen, Lizheng Zhang, Vladimir Zolotov, Chandu Visweswariah, Jinjun Xiong
Static timing: Back to our roots. ASP-DAC (2008)
Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah, Peter A. Habitz
Optimal Margin Computation for At-Speed Test. DATE (2008)
Jinjun Xiong, Vladimir Zolotov, Lei He
Robust Extraction of Spatial Correlation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (4) (2007)
Vladimir Zolotov, Jinjun Xiong, Soroush Abbaspour, David J. Hathaway, Chandu Visweswariah
Compact modeling of variational waveforms. ICCAD (2007)
Vikram Iyengar, Jinjun Xiong, Subbayyan Venkatesan, Vladimir Zolotov, David E. Lackey, Peter A. Habitz, Chandu Visweswariah
Variation-aware performance verification using at-speed structural test and statistical timing. ICCAD (2007)
Haldun Haznedar, Martin Gall, Vladimir Zolotov, Pon Sung Ku, Chanhee Oh, Rajendran Panda
Impact of stress-induced backflow on full-chip electromigration risk assessment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (6) (2006)
Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
Optimal placement of power-supply pads and pins. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (1) (2006)
Jinjun Xiong, Vladimir Zolotov, Natesan Venkateswaran, Chandu Visweswariah
Criticality computation in parameterized statistical timing. DAC (2006)
Jinjun Xiong, Vladimir Zolotov, Lei He
Robust extraction of spatial correlation. ISPD (2006)
Murat R. Becer, Vladimir Zolotov, Rajendran Panda, Amir Grinshpon, Ilan Algor, Rafi Levy, Chanhee Oh
Pessimism reduction in crosstalk noise aware STA. ICCAD (2005)
Matthew R. Guthaus, Natesan Venkateswaran, Chandu Visweswariah, Vladimir Zolotov
Gate sizing using incremental parameterized statistical timing analysis. ICCAD (2005)
Hongliang Chang, Vladimir Zolotov, Sambasivan Narayan, Chandu Visweswariah
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions. DAC (2005)
Matthew R. Guthaus, Natesan Venkateswaran, Vladimir Zolotov, Dennis Sylvester, Richard B. Brown
Optimization objectives and models of variation for statistical gate sizing. ACM Great Lakes Symposium on VLSI (2005)
Saumil Shah, Ashish Srivastava, Dushyant Sharma, Dennis Sylvester, David T. Blaauw, Vladimir Zolotov
Discrete Vt assignment and gate sizing using a self-snapping continuous formulation. ICCAD (2005)
Amit Jain, David T. Blaauw, Vladimir Zolotov
Accurate delay computation for noisy waveform shapes. ICCAD (2005)
Aseem Agarwal, Kaviraj Chopra, David T. Blaauw, Vladimir Zolotov
Circuit optimization using statistical static timing analysis. DAC (2005)
Murat R. Becer, David T. Blaauw, Ilan Algor, Rajendran Panda, Chanhee Oh, Vladimir Zolotov, Ibrahim N. Hajj
Postroute gate sizing for crosstalk noise reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (12) (2004)
Alexey Glebov, Sergey Gavrilov, R. Soloviev, Vladimir Zolotov, Murat R. Becer, Chanhee Oh, Rajendran Panda
Delay noise pessimism reduction by logic correlations. ICCAD (2004)
Aseem Agarwal, Vladimir Zolotov, David T. Blaauw
Statistical clock skew analysis considering intradie-process variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (8) (2004)
Chanhee Oh, Haldun Haznedar, Martin Gall, Amir Grinshpon, Vladimir Zolotov, Pon Sung Ku, Rajendran Panda
A Methodology for Chip-Level Electromigration Risk Assessment and Product Qualification. ISQED (2004)
Alexey Glebov, Sergey Gavrilov, Vladimir Zolotov, Chanhee Oh, Rajendran Panda, Murat R. Becer
False-Noise Analysis for Domino Circuits. DATE (2004)
Dongwoo Lee, Vladimir Zolotov, David T. Blaauw
Static timing analysis using backward signal propagation. DAC (2004)
Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
Optimal placement of power supply pads and pins. DAC (2004)
Sanjay Pant, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
A stochastic approach To power grid analysis. DAC (2004)
David T. Blaauw, Chanhee Oh, Vladimir Zolotov, Aurobindo Dasgupta
Static electromigration analysis for on-chip signal interconnects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (1) (2003)
Murat R. Becer, David T. Blaauw, Ilan Algor, Rajendran Panda, Chanhee Oh, Vladimir Zolotov, Ibrahim N. Hajj
Post-Route Gate Sizing for Crosstalk Noise Reduction. ISQED (2003)
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula
Computation and Refinement of Statistical Bounds on Circuit Delay. DAC (2003)
D. Nadezhin, Sergey Gavrilov, Alexey Glebov, Y. Egorov, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Murat R. Becer, Alexandre Ardelea, A. Patel
SOI Transistor Model for Fast Transient Simulation. ICCAD (2003)
Murat R. Becer, David T. Blaauw, Ilan Algor, Rajendran Panda, Chanhee Oh, Vladimir Zolotov, Ibrahim N. Hajj
Post-route gate sizing for crosstalk noise reduction. DAC (2003)
Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
Table look-up based compact modeling for on-chip interconnect timing and noise analysis. ISCAS (4) (2003)
Chanhee Oh, David T. Blaauw, Murat R. Becer, Vladimir Zolotov, Rajendran Panda, Aurobindo Dasgupta
Static Electromigration Analysis for Signal Interconnects. ISQED (2003)
Aseem Agarwal, Vladimir Zolotov, David T. Blaauw
Statistical timing analysis using bounds and selective enumeration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (9) (2003)
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations. ICCAD (2003)
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula
Statistical Timing Analysis Using Bounds. DATE (2003)
Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
Fast on-chip inductance simulation using a precorrected-FFT method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (1) (2003)
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov
Statistical Clock Skew Analysis Considering Intra-Die Process Variations. ICCAD (2003)
Sanjay Pant, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
Vectorless Analysis of Supply Noise Induced Delay Variation. ICCAD (2003)
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Min Zhao, Kaushik Gala, Rajendran Panda
Statistical delay computation considering spatial correlations. ASP-DAC (2003)
Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Chanhee Oh
Noise Injection and Propagation in High Performance Designs. ISQED (2002)
Min Zhao, Kaushik Gala, Vladimir Zolotov, Yuhong Fu, Rajendran Panda, R. Ramkumar, Bhuwan K. Agrawal
Worst case clock skew under power supply variations. Timing Issues in the Specification and Synthesis of Digital Systems (2002)
Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Vladimir Zolotov
False-noise analysis using logic implications. ACM Trans. Design Autom. Electr. Syst. 7 (3) (2002)
Kaushik Gala, David T. Blaauw, Vladimir Zolotov, Pravin M. Vaidya, Anil Joshi
Inductance model and analysis methodology for high-speed on-chip interconnect. IEEE Trans. Very Large Scale Integr. Syst. 10 (6) (2002)
Vladimir Zolotov, David T. Blaauw, Supamas Sirichotiyakul, Murat R. Becer, Chanhee Oh, Rajendran Panda, Amir Grinshpon, Rafi Levy
Noise propagation and failure criteria for VLSI designs. ICCAD (2002)
David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran
Slope propagation in static timing analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (10) (2002)
Murat R. Becer, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Ibrahim N. Hajj
Analysis of Noise Avoidance Techniques in DSM Interconnects Using a Complete Crosstalk Noise Model . DATE (2002)
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula
Statistical timing analysis using bounds and selective enumeration. Timing Issues in the Specification and Synthesis of Digital Systems (2002)
Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Vladimir Zolotov, Rajendran Panda, Chanhee Oh
False-Noise Analysis Using Resolution Method. ISQED (2002)
Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
A precorrected-FFT method for simulating on-chip inductance. ICCAD (2002)
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula
Statistical timing analysis using bounds and selective enumeration. Timing Issues in the Specification and Synthesis of Digital Systems (2002)
Murat R. Becer, David T. Blaauw, Supamas Sirichotiyakul, Chanhee Oh, Vladimir Zolotov, Jingyan Zuo, Rafi Levy, Ibrahim N. Hajj
A Global Driver Sizing Tool for Functional Crosstalk Noise Avoidance. ISQED (2001)
Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Supamas Sirichotiyakul, Chanhee Oh, Vladimir Zolotov
False-Noise Analysis using Logic Implications. ICCAD (2001)
Kaushik Gala, David T. Blaauw, Junfeng Wang, Vladimir Zolotov, Min Zhao
Inductance 101: Analysis and Design Issues. DAC (2001)
Supamas Sirichotiyakul, David T. Blaauw, Chanhee Oh, Rafi Levy, Vladimir Zolotov, Jingyan Zuo
Driver Modeling and Alignment for Worst-Case Delay Noise. DAC (2001)
Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Brian Young, Junfeng Wang, David T. Blaauw
On-chip inductance modeling and analysis. DAC (2000)
Rafi Levy, David T. Blaauw, Gabi Braca, Aurobindo Dasgupta, Amir Grinshpon, Chanhee Oh, Boaz Orshav, Supamas Sirichotiyakul, Vladimir Zolotov
ClariNet: a noise analysis tool for deep submicron design. DAC (2000)
David T. Blaauw, Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Junfeng Wang
On-chip inductance modeling. ACM Great Lakes Symposium on VLSI (2000)
David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Chanhee Oh, Rajendran Panda
Slope Propagation in Static Timing Analysis. ICCAD (2000)
Rajendran Panda, David T. Blaauw, Rajat Chaudhry, Vladimir Zolotov, Brian Young, Ravi Ramaraju
Model and analysis for combined package and on-chip power grid simulation. ISLPED (2000)