Kaviraj Chopra

Publication Activity (10 Years)

Years Active: 2004-2011
Publications (10 Years): 0

Publications

Vineeth Veetil, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
Fast Statistical Static Timing Analysis Using Smart Monte Carlo Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (6) (2011)
Cheng Zhuo, Kaviraj Chopra, Dennis Sylvester, David T. Blaauw
Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (9) (2011)
Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
Victim Alignment in Crosstalk-Aware Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (2) (2010)
Ashish Srivastava, Kaviraj Chopra, Saumil Shah, Dennis Sylvester, David T. Blaauw
A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (2) (2008)
David T. Blaauw, Kaviraj Chopra, Ashish Srivastava, Louis Scheffer
Statistical Timing Analysis: From Basic Principles to State of the Art. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (4) (2008)
Kaviraj Chopra, Cheng Zhuo, David T. Blaauw, Dennis Sylvester
A statistical approach for full-chip gate-oxide reliability analysis. ICCAD (2008)
Brian Cline, Kaviraj Chopra, David T. Blaauw, Andres Torres, Savithri Sundareswaran
Transistor-Specific Delay Modeling for SSTA. DATE (2008)
Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
Computing the Soft Error Rate of a Combinational Logic Circuit Using Parameterized Descriptors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (3) (2007)
Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer, Joao Geada
Victim alignment in crosstalk aware timing analysis. ICCAD (2007)
Aseem Agarwal, Kaviraj Chopra, David T. Blaauw
Statistical Timing Based Optimization using Gate Sizing CoRR (2007)
Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer
Top-k Aggressors Sets in Delay Noise Analysis. DAC (2007)
Kaviraj Chopra, Sarma B. K. Vrudhula
Efficient Symbolic Algorithms for Computing the Minimum and Bounded Leakage States. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (12) (2006)
Brian Cline, Kaviraj Chopra, David T. Blaauw, Yu Cao
Analysis and modeling of CD variation for statistical static timing. ICCAD (2006)
Kaviraj Chopra, Bo Zhai, David T. Blaauw, Dennis Sylvester
A new statistical max operation for propagating skewness in statistical timing analysis. ICCAD (2006)
Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
An efficient static algorithm for computing the soft error rates of combinational circuits. DATE (2006)
Aseem Agarwal, Kaviraj Chopra, David T. Blaauw, Vladimir Zolotov
Circuit optimization using statistical static timing analysis. DAC (2005)
Kaviraj Chopra, Saumil Shah, Ashish Srivastava, David T. Blaauw, Dennis Sylvester
Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation. ICCAD (2005)
Aseem Agarwal, Kaviraj Chopra, David T. Blaauw
Statistical Timing Based Optimization using Gate Sizing. DATE (2005)
David T. Blaauw, Kaviraj Chopra
CAD tools for variation tolerance. DAC (2005)
Sridhar Dasika, Sarma B. K. Vrudhula, Kaviraj Chopra, R. Srinivasan
A Framework for Battery-Aware Sensor Management. DATE (2004)
Kaviraj Chopra, Sarma B. K. Vrudhula, Sarvesh Bhardwaj
Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic. VLSI Design (2004)
Kaviraj Chopra, Sarma B. K. Vrudhula
Implicit pseudo boolean enumeration algorithms for input vector control. DAC (2004)