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Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic.
Kaviraj Chopra
Sarma B. K. Vrudhula
Sarvesh Bhardwaj
Published in:
VLSI Design (2004)
Keyphrases
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square error
high speed
probability distribution
low cost
analog vlsi
machine learning
image processing
power consumption
finite state machines
power supply
single chip
delay insensitive
vlsi circuits