Kaushik Gala

Publication Activity (10 Years)

Years Active: 2000-2003
Publications (10 Years): 0

Publications

Haihua Su, Kaushik Gala, Sachin S. Sapatnekar
Analysis and optimization of structured power/ground networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (11) (2003)
Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
Table look-up based compact modeling for on-chip interconnect timing and noise analysis. ISCAS (4) (2003)
Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
Fast on-chip inductance simulation using a precorrected-FFT method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (1) (2003)
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Min Zhao, Kaushik Gala, Rajendran Panda
Statistical delay computation considering spatial correlations. ASP-DAC (2003)
Min Zhao, Kaushik Gala, Vladimir Zolotov, Yuhong Fu, Rajendran Panda, R. Ramkumar, Bhuwan K. Agrawal
Worst case clock skew under power supply variations. Timing Issues in the Specification and Synthesis of Digital Systems (2002)
Kaushik Gala, David T. Blaauw, Vladimir Zolotov, Pravin M. Vaidya, Anil Joshi
Inductance model and analysis methodology for high-speed on-chip interconnect. IEEE Trans. Very Large Scale Integr. Syst. 10 (6) (2002)
Haitian Hu, David T. Blaauw, Vladimir Zolotov, Kaushik Gala, Min Zhao, Rajendran Panda, Sachin S. Sapatnekar
A precorrected-FFT method for simulating on-chip inductance. ICCAD (2002)
Kaushik Gala, David T. Blaauw, Junfeng Wang, Vladimir Zolotov, Min Zhao
Inductance 101: Analysis and Design Issues. DAC (2001)
Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Brian Young, Junfeng Wang, David T. Blaauw
On-chip inductance modeling and analysis. DAC (2000)
Haihua Su, Kaushik Gala, Sachin S. Sapatnekar
Fast Analysis and Optimization of Power/Ground Networks. ICCAD (2000)
David T. Blaauw, Kaushik Gala, Vladimir Zolotov, Rajendran Panda, Junfeng Wang
On-chip inductance modeling. ACM Great Lakes Symposium on VLSI (2000)