Viera Stopjaková

ORCID

Publication Activity (10 Years)

Years Active: 1997-2024
Publications (10 Years): 63

Top Venues

DDECS

MIPRO

MIXDES

J. Circuits Syst. Comput.

Publications

Adam Hudec, Róbert Ondica, Richard Ravasz, Viera Stopjaková
Constant Voltage Maximum Power Point Tracking Method for Fully Integrated Solar-Powered Energy Harvester. DDECS (2024)
Martin Kovác, Miroslav Potocný, Daniel Arbet, Róbert Ondica, Richard Ravasz, Viera Stopjaková
Low-Power CMOS Frequency Comparator. MIPRO (2023)
Richard Ravasz, David Maljar, Daniel Arbet, Viera Stopjaková, Peter Kubinec
Design of the Slope Detection Circuit for On-Chip Current Sensing. MIXDES (2023)
Fabian Khateb, Montree Kumngern, Tomasz Kulej, Viera Stopjaková, Costas Psychalinos
0.3-V, 357.4-nW Voltage-Mode First-Order Analog Filter Using a Multiple-Input VDDDA. IEEE Access 11 (2023)
Lukás Nagy, Michal Sovcik, Viera Stopjaková
Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range. AFRICON (2023)
Tomasz Kulej, Fabian Khateb, Daniel Arbet, Viera Stopjaková
A 0.3-V High Linear Rail-to-Rail Bulk-Driven OTA in 0.13 μm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 69 (4) (2022)
David Maljar, Daniel Arbet, Martin Kovác, Róbert Ondica, Viera Stopjaková
Autocalibration Approach for Improving Robustness of Analog ICs. DDECS (2022)
Fabian Khateb, Montree Kumngern, Tomasz Kulej, Meysam Akbari, Viera Stopjaková
0.5 V, nW-Range Universal Filter Based on Multiple-Input Transconductor for Biosignals Processing. Sensors 22 (22) (2022)
Daniel Arbet, Martin Kovác, David Maljas, Lukás Nagy, Viera Stopjaková
High Power Supply Rejection LDO Regulator for Switching Applications. MIPRO (2022)
Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology. RADIOELEKTRONIKA (2022)
Richard Ravasz, Adam Hudec, Daniel Arbet, Viera Stopjaková
On-Chip Current Sensing Approaches for DC-DC Converters. DDECS (2022)
Miroslav Hagara, Oldrich Ondrácek, Viera Stopjaková, Radovan Stojanovic
Histogram memory reduction in FPGA gradient edge detectors. MECO (2022)
Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Róbert Ondica, Viera Stopjaková
EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method. AFRICON (2021)
David Maljar, Michal Sovcík, Daniel Arbet, Viera Stopjaková
Enhanced Reliability of Fully Differential Difference Amplifier Through On-chip Digital Calibration. DDECS (2021)
Róbert Ondica, Daniel Arbet, Martin Kovác, Viera Stopjaková
Investigation of Inductor-based Fully On-chip Boost Converter. MIXDES (2021)
Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design. DDECS (2021)
Daniel Arbet, Miroslav Potocný, Martin Kovác, Lukás Nagy, Viera Stopjaková
Fully On-Chip Low-Drop Regulator for Low-Power Applications. MIPRO (2021)
Miroslav Potocný, Martin Kovác, Daniel Arbet, Michal Sovcik, Lukás Nagy, Viera Stopjaková, Richard Ravasz
Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications. Sensors 21 (17) (2021)
Lukás Kohútka, Lukás Nagy, Viera Stopjaková
RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. CoRR (2021)
Erik Vavrinsky, Viera Stopjaková, Martin Kopani, Helena Kosnácová
The Concept of Advanced Multi-Sensor Monitoring of Human Stress. Sensors 21 (10) (2021)
Adam Hudec, Lukás Nagy, Martin Kovác, Viera Stopjaková
Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology. CoRR (2021)
Lukás Kohútka, Viera Stopjaková
Novel efficient on-chip task scheduler for multi-core hard real-time systems. Microprocess. Microsystems 76 (2020)
Lukás Kohútka, Lukás Nagy, Viera Stopjaková
RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. MECO (2020)
Lukás Nagy, Ales Chvála, Viera Stopjaková
Low-Leakage ESD Structures in 130nm CMOS Technology. RADIOELEKTRONIKA (2020)
Miroslav Potocný, Michal Sovcík, Viera Stopjaková
Development of test equipment for evaluation of low-power AC/DC converter ASIC. RADIOELEKTRONIKA (2020)
Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology. DDECS (2020)
Michal Sovcík, Viera Stopjaková, Daniel Arbet, Miroslav Potocný
Autonomous On-Chip Digital Calibration for Analog ICs in Nanotechnologies. RADIOELEKTRONIKA (2020)
Lukás Kohútka, Viera Stopjaková
ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems. MIXDES (2020)
Martin Kovác, Daniel Arbet, Lukás Nagy, Michal Sovcik, Viera Stopjaková
Multi-Topology DC-DC Converter for Low-Voltage Energy Harvesting Systems. MIPRO (2020)
Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková
Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology. DDECS (2019)
Daniel Arbet, Martin Kovác, Viera Stopjaková, Miroslav Potocný
Voltage-to-Frequency Converter for Ultra-Low-Voltage Applications. MIPRO (2019)
Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková
Performance Analysis Of Ultra Low-Voltage Rail-to-Rail Comparator In 130 nm CMOS Technology. AFRICON (2019)
Martin Kovác, Daniel Arbet, Viera Stopjaková, Michal Sovcik, Lukás Nagy
Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology. DDECS (2019)
Lukás Kohútka, Lukás Nagy, Viera Stopjaková
A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. J. Circuits Syst. Comput. 28 (Supplement-1) (2019)
Lukás Kohútka, Viera Stopjaková
A New Hardware-Accelerated Scheduler for Soft Real-Time Tasks. MECO (2019)
Viera Stopjaková, Martin Kovác, Daniel Arbet, Lukás Nagy
Towards Energy-autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design. MIXDES (2019)
Lukás Kohútka, Lukás Nagy, Viera Stopjaková
Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. DDECS (2019)
Zoran Stamenkovic, Alberto Bosio, György Cserey, Ondrej Novák, Witold A. Pleskacz, Lukás Sekanina, Andreas Steininger, Goran Stojanovic, Viera Stopjaková
International Symposium on Design and Diagnostics of Electronic Circuits and Systems. ITC (2019)
Miroslav Potocný, Juraj Brenkus, Viera Stopjaková
High side power MOSFET switch driver for a low-power AC/DC converter. DDECS (2019)
Miroslav Potocný, Viera Stopjaková, Martin Kovác
Self Vth-Compensating CMOS On-Chip Rectifier for Inductively Powered Implantable Medical Devices. DDECS (2018)
Michal Sovcik, Martin Kovác, Daniel Arbet, Viera Stopjaková, Miroslav Potocný
Ultra-low-voltage boosted driver for self-powered systems. Microelectron. Reliab. 80 (2018)
Daniel Arbet, Martin Kovác, Viera Stopjaková, Miroslav Potocný
Bulk-driven fully differential difference amplifier for ultra-low voltage applications. MIPRO (2018)
Lukás Kohútka, Viera Stopjaková
Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems. DDECS (2018)
Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik
Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. DDECS (2018)
Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková
Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. DDECS (2018)
Lukás Kohútka, Viera Stopjaková
A novel hardware-accelerated real-time task scheduler based on robust earliest deadline algorithm. DTIS (2018)
Lukás Kohútka, Viera Stopjaková
Reliable real-time task scheduler based on Rocket Queue architecture. Microelectron. Reliab. 84 (2018)
Lukás Kohútka, Lukás Nagy, Viera Stopjaková
A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. DSD (2018)
Michal Sovcik, Martin Kovác, Daniel Arbet, Viera Stopjaková
Ultra-low-voltage driver for large load capacitance in 130nm CMOS technology. DDECS (2017)
Juraj Brenkus, Viera Stopjaková, Viera Cernanová, Daniel Arbet, Lukás Nagy, Vladimír Sedlák
A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits. J. Circuits Syst. Comput. 26 (8) (2017)
Andreas Steininger, Adam Pawlak, Viera Stopjaková
Foreword. J. Circuits Syst. Comput. 26 (8) (2017)
Daniel Arbet, Viera Stopjaková, Martin Kovác, Lukás Nagy, Matej Rakus, Michal Sovcik
130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. J. Circuits Syst. Comput. 26 (8) (2017)
Lukás Nagy, Daniel Arbet, Martin Kovác, Viera Stopjaková
Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology. AFRICON (2017)
Lukás Kohútka, Viera Stopjaková
A new efficient sorting architecture for real-time systems. MECO (2017)
Lukás Kohútka, Viera Stopjaková
Rocket Queue: New data sorting architecture for real-time systems. DDECS (2017)
Lukás Kohútka, Viera Stopjaková
Improved Task Scheduler for Dual-Core Real-Time Systems. DSD (2016)
Matej Rakus, Viera Stopjaková, Daniel Arbet
Comparison of gate-driven and bulk-driven current mirror topologies. DDECS (2016)
Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Juraj Brenkus
Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology. DDECS (2016)
Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková
Fully Differential Difference Amplifier for Low-Noise and Low-Distortion Applications. J. Circuits Syst. Comput. 25 (3) (2016)
Lukás Kohútka, Viera Stopjaková
Task scheduler for dual-core real-time systems. MIXDES (2016)
Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik
Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology. MIPRO (2016)
Michal Sovcik, Michal Matuska, Daniel Arbet, Viera Stopjaková
CMOS variable-gain amplifier for low-frequency applications. DDECS (2016)
Juraj Brenkus, Viera Stopjaková, Lukás Nagy, Daniel Arbet
Impedance calculation based method for AC fault analysis of mixed-signal circuits. DDECS (2016)
Daniel Arbet, Viera Stopjaková, Martin Kovác
Investigation of the optimum oscillation frequency value towards increasing the efficiency of OBIST approach. Microelectron. Reliab. 55 (7) (2015)
Lukás Nagy, Viera Stopjaková, Alexander Satka
Design of In AlN/GaN Heterostructure-Based Logic Cells. DDECS (2015)
Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková, Lukás Nagy
Readout interface for capacitive MEMS microphone in CMOS technology. MIXDES (2015)
Daniel Arbet, Gabriel Nagy, Martin Kovác, Viera Stopjaková
Fully Differential Difference Amplifier for Low-Noise Applications. DDECS (2015)
Roman Záluský, Daniela Durackova, Viera Stopjaková, Lukás Nagy, Vladimír Sedlák
Novel architecture of a digital neuron for FFNN employing special multiplication. ECAI (2014)
Gábor Gyepes, Viera Stopjaková, Daniel Arbet, Libor Majer, Juraj Brenkus
test approach and its efficiency in covering resistive opens in SRAM arrays. Microprocess. Microsystems 38 (5) (2014)
Daniel Arbet, Viera Stopjaková, Juraj Brenkus, Gábor Gyepes, Martin Kovác, Libor Majer
BIST architecture for oscillation test of analog ICs and investigation of test hardware influence. Microelectron. Reliab. 54 (5) (2014)
Lukás Nagy, Viera Stopjaková, Juraj Brenkus
Current Sensing Completion Detection in Single-Rail Asynchronous Systems. Comput. Informatics 33 (5) (2014)
Martin Kovác, Daniel Arbet, Gabriel Nagy, Viera Stopjaková
An approach towards selection of the oscillation frequency for oscillation test of analog ICs. DDECS (2014)
Juraj Brenkus, Viera Stopjaková, Daniel Arbet, Gábor Gyepes, Libor Majer
A novel impedance calculation method and its time efficiency evaluation. DDECS (2014)
Juraj Brenkus, Viera Stopjaková, Gábor Gyepes
Numerical method for DC fault analysis simplification and simulation time reduction. DDECS (2013)
Lukás Nagy, Viera Stopjaková, Roman Záluský
Completion detection in dual-rail asynchronous systems by current-sensing. Microelectron. J. 44 (6) (2013)
Gabriel Nagy, Daniel Arbet, Viera Stopjaková
Digital methods of offset compensation in 90nm CMOS operational amplifiers. DDECS (2013)
Daniel Arbet, Gabriel Nagy, Viera Stopjaková, Gábor Gyepes
Efficiency of oscillation-based BIST in 90nm CMOS active analog filters. DDECS (2013)
Daniel Arbet, Gábor Gyepes, Juraj Brenkus, Viera Stopjaková
OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters. DDECS (2012)
Gábor Gyepes, Daniel Arbet, Juraj Brenkus, Viera Stopjaková
Application of IDDT test towards increasing SRAM reliability in nanometer technologies. DDECS (2012)
Lukás Nagy, Viera Stopjaková
Current sensing completion detection in dual-rail asynchronous systems. DDECS (2012)
Daniel Arbet, Juraj Brenkus, Gábor Gyepes, Viera Stopjaková
Increasing the efficiency of analog OBIST using on-chip compensation of technology variations. DDECS (2011)
Gábor Gyepes, Juraj Brenkus, Daniel Arbet, Viera Stopjaková
Comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies. DDECS (2011)
Lukás Nagy, Viera Stopjaková
Current sensing methodology for completion detection in self-timed systems. DDECS (2011)
Erik Vavrinsky, Martin Daricek, Martin Donoval, Peter Telek, Viera Stopjaková, Vladimir Tvarozek
Alternative methods for heart-rate sensing. ISABEL (2011)
Libor Majer, Viera Stopjaková
The novel approach to wideband RFIC receivers in standard CMOS process. DDECS (2010)
Lukás Nagy, Viera Stopjaková
Current Sensing Completion Detection in deep sub-micron technologies. DDECS (2010)
Juraj Brenkus, Viera Stopjaková, Ronny Vanhooren, Anton Chichkov
Comparison of different test strategies on a mixed-signal circuit. DDECS (2009)
Martin Donoval, Martin Daricek, Juraj Marek, Viera Stopjaková
Vertical and horizontal magnetic force sensor and application of sensor in power devices. ECCTD (2009)
Martin Donoval, Martin Daricek, Juraj Marek, Viera Stopjaková
Power devices current monitoring using horizontal and vertical magnetic force sensor. DDECS (2009)
Martin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek
On-chip Integration of Magnetic Force Sensing Current Monitors. DDECS (2008)
Juraj Brenkus, Viera Stopjaková, Jozef Mihálov
Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation. DDECS (2008)
Martin Simlastík, Viera Stopjaková
Automated Synchronous-to-Asynchronous Circuits Conversion: A Survey. PATMOS (2008)
Martin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek
On-chip supply current monitoring units using magnetic force sensing. ICECS (2008)
Marcin J. Beresinski, Tomasz Borejko, Witold A. Pleskacz, Viera Stopjaková
Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology. DDECS (2008)
Witold A. Pleskacz, Viera Stopjaková, Tomasz Borejko, Artur Jutman, Andrzej Wakanis
DefSim: A Remote Laboratory for Studying Physical Defects in CMOS Digital Circuits. IEEE Trans. Ind. Electron. 55 (6) (2008)
Libor Majer, Viera Stopjaková
Portable Measurement Equipment for Continuous Biomedical Monitoring using Microelectrodes. DDECS (2008)
Martin Simlastík, Viera Stopjaková, Libor Majer, Peter Malík
Clockless Implementation of LEON2 for Low-Power Applications. DDECS (2007)
Pavol Malosek, Viera Stopjaková
PCA Data Preprocessing for Neural Network-based Detection of Parametric Defects in Analog IC. DDECS (2006)
Vladislav Nagy, Viera Stopjaková
New Current Monitor Using Auto Zero Voltage Comparator for IDD Testing of Mixed-signal Circuits. DDECS (2006)
Witold A. Pleskacz, Tomasz Borejko, A. Walkanis, Viera Stopjaková, Artur Jutman, Raimund Ubar
DefSim: CMOS Defects on Chip for Research and Education. LATW (2006)

Viera Stopjaková.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Viera Stopjaková