Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range.

Lukás Nagy Michal Sovcik Viera Stopjaková

Published in: AFRICON (2023)

Keyphrases

cmos technology
low power
high speed
ultra low power
single chip
spl times
low voltage
power consumption
computer vision
mixed signal
power dissipation
design methodology
design process
image processing
user interface
low cost
cmos image sensor
case study
computer systems
low power consumption
digital images