Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology.

Lukás Nagy Daniel Arbet Martin Kovác Miroslav Potocný Viera Stopjaková

Published in: DDECS (2019)

Keyphrases

cmos technology
low voltage
low power
high speed
power consumption
power dissipation
parallel processing
design considerations
mixed signal
image sensor
low cost
random access memory
real time
digital signal processing