Low-Leakage ESD Structures in 130nm CMOS Technology.

Lukás Nagy Ales Chvála Viera Stopjaková

Published in: RADIOELEKTRONIKA (2020)

Keyphrases

cmos technology
low power
spl times
power consumption
low voltage
parallel processing
silicon on insulator
high speed
image processing
power dissipation
edge detection
mixed signal
pattern recognition
image sensor