Toshiki Kanamoto

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 19

Top Topics

Extensive Simulations

Top Venues

IEICE Electron. Express

Publications

Mai Yamaguchi, Mai Yamakawa, Seiji Mochizuki, Kousuke Imamura, Toshiki Kanamoto, Tetsuya Matsumura
Ultra-Low-Latency Video Coding with Reduced Frame Memory Structure for 4K/8K High-Resolution Video. GCCE (2023)
Kai Sato, Toshiki Kanamoto, Ryotaro Kudo, Koutaro Hachiya, Atsushi Kurokawa
Bayesian neural network based inductance calculations of wireless power transfer systems. IEICE Electron. Express 20 (5) (2023)
Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa
A parabolic spiral coil transmitter with uniform magnetic field for smart devices. IEICE Electron. Express 20 (1) (2023)
Kyosuke Kusumi, Koutaro Hachiya, Ryotaro Kudo, Toshiki Kanamoto, Atsushi Kurokawa
Electronic component placement optimization for heat measures of smartglasses. IEICE Electron. Express 20 (6) (2023)
Taisei Arima, Shigeru Hidaka, Ryosuke Watanabe, Tomoya Akasaka, Atsushi Kurokawa, Toshiki Kanamoto
A thermally optimizing method of thin film resistor trimming with machine learning. IEICE Electron. Express 20 (5) (2023)
Fumiya Sano, Kouki Fukuda, Shinji Kubo, Sumio Tanba, Yamato Ishida, Atushi Kurokawa, Toshiki Kanamoto
LoRa Based Wireless Sensor Network for Bus Tracking System in Contoured Castle Town. GCCE (2023)
Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa
A bernoulli spiral coil transmitter for charging various small electronic devices. IEICE Electron. Express 19 (23) (2022)
Ryosuke Watanabe, Shigeru Hidaka, Tomoya Akasaka, Shota Kajiya, Taisei Arima, Atsushi Kurokawa, Toshiki Kanamoto
Enhanced laser trimming of thin film resistors dedicated to snubber for high power IGBT modules. MWSCAS (2022)
Kai Sato, Toshiki Kanamoto, Ryotaro Kudo, Koutaro Hachiya, Atsushi Kurokawa
Deep Neural Network Based Inductance Calculations of Wireless Power Transfer Systems. GCCE (2022)
Shinsuke Kashiwazaki, Koutaro Hachiya, Toshiki Kanamoto, Ryosuke Watanabe, Atsushi Kurokawa
Receiver coil built into belt for heat dissipation of watch-type smart devices. IEICE Electron. Express 19 (3) (2022)
Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa
A Parabolic Spiral Coil Transmitter for Charging Multiple Receivers. GCCE (2022)
Kodai Matsuhashi, Koutaro Hachiya, Toshiki Kanamoto, Shinsuke Kashiwazaki, Kyosuke Kusumi, Atsushi Kurokawa
Effective methods to promote heat dissipation of wrist wearables. IEICE Electron. Express 18 (5) (2021)
Peng Yang, Tomoyuki Nagase, Toshiki Kanamoto, Tsutomu Zeniya, Shan You
A Virtual Optical Holographic Encryption System Using Expanded Diffie-Hellman Algorithm. IEEE Access 9 (2021)
Yuuta Satomi, Koutaro Hachiya, Toshiki Kanamoto, Ryosuke Watanabe, Atsushi Kurokawa
Thermal placement on PCB of components including 3D ICs. IEICE Electron. Express 17 (3) (2020)
Toshiki Kanamoto, Koki Kasai, Kan Hatakeyama, Atsushi Kurokawa, Tomoyuki Nagase, Masashi Imai
A simple yet precise capacitance estimation method for on-chip power delivery network towards EMC analysis. IEICE Electron. Express 17 (14) (2020)
Kodai Matsuhashi, Toshiki Kanamoto, Atsushi Kurokawa
Thermal Model and Countermeasures for Future Smart Glasses. Sensors 20 (5) (2020)
Toshiki Kanamoto, Masami Fukushima, Koichi Kitagishi, Seijin Nakayama, Hideki Ishihara, Koki Kasai, Atsushi Kurokawa, Masashi Imai
A Single-Stage RISC-V Processor to Mitigate the Von Neumann Bottleneck. MWSCAS (2019)
Koutaro Inaba, Tomohiro Yoneda, Toshiki Kanamoto, Atsushi Kurokawa, Masashi Imai
Hardware Trojan Insertion and Detection in Asynchronous Circuits. ASYNC (2019)
Kazuyuki Sakata, Takashi Hasegawa, Kouji Ichikawa, Toshiki Kanamoto
Impact of mutual inductance on timing in nano-scale SoC. IEICE Electron. Express 15 (11) (2018)
Toshiki Kanamoto, Takeichiro Akamine, Hiroaki Ammo, Takashi Hasegawa, Kouhei Shimizu, Yoshinori Kumano, Masaharu Kawano, Atsushi Kurokawa
Structure optimization for timing in nano scale FinFET. IEICE Electron. Express 12 (9) (2015)
Toshiki Kanamoto, Hisato Inaba, Toshiharu Chiba, Yasuhiro Ogasahara
Resistivity-based modeling of substrate non-uniformity for low-resistivity substrate. IEICE Electron. Express 11 (3) (2014)
Yasuhiro Ogasahara, Masanori Hashimoto, Toshiki Kanamoto, Takao Onoye
Supply Noise Suppression by Triple-Well Structure. IEEE Trans. Very Large Scale Integr. Syst. 21 (4) (2013)
Takashi Sato, Toshiki Kanamoto, Saiko Kobayashi, Nobuhiko Goto, Takao Sato, Hitoshi Sugihara, Hiroo Masuda
A New LDMOS Transistor Macro-Modeling for Accurately Predicting Bias Dependence of Gate-Overlap Capacitance. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (9) (2010)
Kenta Yamada, Toshiyuki Syo, Hisao Yoshimura, Masaru Ito, Tatsuya Kunikiyo, Toshiki Kanamoto, Shigetaka Kumashiro
Exhaustive and Systematic Accuracy Verification and Enhancement of STI Stress Compact Model for General Realistic Layout Patterns. IEICE Trans. Electron. (8) (2010)
Toshiki Kanamoto, Takaaki Okumura, Katsuhiro Furukawa, Hiroshi Takafuji, Atsushi Kurokawa, Koutaro Hachiya, Tsuyoshi Sakata, Masakazu Tanaka, Hidenari Nakashima, Hiroo Masuda, Takashi Sato, Masanori Hashimoto
Impact of Self-Heating in Wire Interconnection on Timing. IEICE Trans. Electron. (3) (2010)
Tsuyoshi Sakata, Takaaki Okumura, Atsushi Kurokawa, Hidenari Nakashima, Hiroo Masuda, Takashi Sato, Masanori Hashimoto, Koutaro Hachiya, Katsuhiro Furukawa, Masakazu Tanaka, Hiroshi Takafuji, Toshiki Kanamoto
An Approach for Reducing Leakage Current Variation due to Manufacturing Variability. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2009)
Takaaki Okumura, Atsushi Kurokawa, Hiroo Masuda, Toshiki Kanamoto, Masanori Hashimoto, Hiroshi Takafuji, Hidenari Nakashima, Nobuto Ono, Tsuyoshi Sakata, Takashi Sato
Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2009)
Keiichi Suemitsu, Toshiaki Ito, Toshiki Kanamoto, Masayuki Terai, Satoshi Kotani, Shigeo Sawada
A Parallel Method to Extract Critical Areas of Net Pairs for Diagnosing Bridge Faults. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2008)
Toshiki Kanamoto, Yasuhiro Ogasahara, Keiko Natsume, Kenji Yamaguchi, Hiroyuki Amishiro, Tetsuya Watanabe, Masanori Hashimoto
Impact of Well Edge Proximity Effect on Timing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2008)
Masahiko Omura, Toshiki Kanamoto, Michiko Tsukamoto, Mitsutoshi Shirota, Takashi Nakajima, Masayuki Terai
A Fast Characterizing Method for Large Embedded Memory Modules on SoC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2007)
Toshiki Kanamoto, Yasuhiro Ogasahara, Keiko Natsume, Kenji Yamaguchi, Hiroyuki Amishiro, Tetsuya Watanabe, Masanori Hashimoto
Impact of well edge proximity effect on timing. ESSCIRC (2007)
Toshiki Kanamoto, Tatsuhiko Ikeda, Akira Tsuchiya, Hidetoshi Onodera, Masanori Hashimoto
Si-Substrate Modeling toward Substrate-Aware Interconnect Resistance and Inductance Extraction in SoC Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Toshiki Kanamoto, Shigekiyo Akutsu, Tamiyo Nakabayashi, Takahiro Ichinomiya, Koutaro Hachiya, Atsushi Kurokawa, Hiroshi Ishikawa, Sakae Muromoto, Hiroyuki Kobayashi, Masanori Hashimoto
Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Atsushi Kurokawa, Akira Kasebe, Toshiki Kanamoto, Yun Yang, Zhangcai Huang, Yasuaki Inoue, Hiroo Masuda
Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2006)
Atsushi Kurokawa, Toshiki Kanamoto, Akira Kasebe, Yasuaki Inoue, Hiroo Masuda
A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (11) (2005)
Atsushi Kurokawa, Toshiki Kanamoto, Tetsuya Ibe, Akira Kasebe, Wei Fong Chang, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2005)
Toshiki Kanamoto, Tetsuya Watanabe, Mitsutoshi Shirota, Masayuki Terai, Tatsuya Kunikiyo, Kiyoshi Ishikawa, Yoshihide Ajioka, Yasutaka Horiba
A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2005)
Atsushi Kurokawa, Toshiki Kanamoto, Tetsuya Ibe, Akira Kasebe, Wei Fong Chang, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills. ISQED (2005)
Atsushi Kurokawa, Toshiki Kanamoto, Akira Kasebe, Yasuaki Inoue, Hiroo Masuda
Efficient capacitance extraction method for interconnects with dummy fills. CICC (2004)
Takashi Sato, Toshiki Kanamoto, Atsushi Kurokawa, Yoshiyuki Kawakami, Hiroki Oka, Tomoyasu Kitaura, Hiroyuki Kobayashi, Masanori Hashimoto
Accurate prediction of the impact of on-chip inductance on interconnect delay using electrical and physical parameter-based RSF. ASP-DAC (2003)
Hidehiro Takata, Tetsuya Watanabe, Tetsuo Nakajima, Takashi Takagaki, Hisakazu Sato, Atsushi Mohri, Akira Yamada, Toshiki Kanamoto, Yoshio Matsuda, Shuhei Iwade, Yasutaka Horiba
The D30V/MPEG multimedia processor. IEEE Micro 19 (4) (1999)