Tetsuro Kage

Publication Activity (10 Years)

Years Active: 1988-2005
Publications (10 Years): 0

Publications

Atsushi Kurokawa, Masaharu Yamamoto, Nobuto Ono, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture. ISQED (2005)
Atsushi Kurokawa, Toshiki Kanamoto, Tetsuya Ibe, Akira Kasebe, Wei Fong Chang, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2005)
Atsushi Kurokawa, Toshiki Kanamoto, Tetsuya Ibe, Akira Kasebe, Wei Fong Chang, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda
Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills. ISQED (2005)
Chieki Mizuta, Jiro Iwai, Ken Machida, Tetsuro Kage, Hiroo Masuda
Large-scale linear circuit simulation with an inversed inductance matrix. ASP-DAC (2004)
Atsushi Kurokawa, Nobuto Ono, Tetsuro Kage, Hiroo Masuda
DEPOGIT: dense power-ground interconnect architecture for physical design integrity. ASP-DAC (2004)
Hisanori Fujisawa, Fumiyo Kawafuji, Tomoyasu Kitaura, Tetsuro Kage
A precise event-driven circuit simulator based on predicted fan-in voltages. ED&TC (1995)
Tetsuro Kage, Shintaro Shimogori
Effective Vectorization Techniques for Circuit Analyses on a Vector Computer. Systems and Computers in Japan 19 (7) (1988)