Ivo Bolsens

Publication Activity (10 Years)

Years Active: 1985-2023
Publications (10 Years): 5

Top Topics

Subsumption Architecture

Silicon Dioxide

Reconfigurable Hardware

Top Venues

Publications

Ivo Bolsens
Bridging Divides: Unifying AI Architectures from from Edge to Cloud. MLCAD (2023)
Ivo Bolsens
Scalable System and Silicon Architectures to Handle the Workloads of the Post-Moore Era. ISPD (2021)
Ivo Bolsens
Scalable System and Silicon Architectures to Handle the Workloads of the Post-Moore Era. ISPD (2020)
Ivo Bolsens
"All programmable FPGA, providing hardware efficiency to software programmers". FPL (2017)
Ivo Bolsens
Pushing the boundaries of Moore's Law to transition from FPGA to All Programmable Platform. ISPD (2017)
Ivo Bolsens, Georges G. E. Gielen, Kaushik Roy, Ulf Schneider
"All Programmable SOC FPGA for networking and computing in big data infrastructure". ASP-DAC (2014)
Ivo Bolsens
FPGA platforms leading the way in the application of 'more than Moore's' technology. FPT (2010)
Ivo Bolsens
Programming customized parallel architectures in FPGA. IPDPS Workshops (2010)
Ivo Bolsens
NoCs: It is about the memory and the programming model. NOCS (2009)
Ivo Bolsens
FPGA: The future platform for transforming, transporting and computing data. FPL (2008)
Jason Cong, Tony Ma, Ivo Bolsens, Phil Moorby, Jan M. Rabaey, John Sanguinetti, Kazutoshi Wakabayashi, Yoshi Watanabe
Are we ready for system-level synthesis? ASP-DAC (2005)
Ivo Bolsens
Plenary lecture [Second page is blank]. ECCTD (2005)
Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar
What happened to ASIC?: Go (recon)figure? DAC (2004)
Bart Vanhoof, Lode Nachtergaele, Gauthier Lafruit, Mercedes Peón, Bart Masschelein, Francky Catthoor, Jan Bormans, Ivo Bolsens
A scalable MPEG-4 wavelet-based visual texture compression system with optimized memory organization. IEEE Trans. Circuits Syst. Video Technol. 13 (4) (2003)
Wolfgang Rosenstiel, Rudy Lauwereins, Ivo Bolsens, Chris Rowen, Yankin Tanurhan, Kees A. Vissers, S. Wang
Panel Title: Reconfigurable Computing - Different Perspectives. DATE (2003)
Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi
Fast, cheap and under control: the next implementation fabric. DAC (2003)
Ivo Bolsens
Challenges and Opportunities for FPGA Programmable System Platforms. IOLTS (2003)
Steve Guccione, Diederik Verkest, Ivo Bolsens
Design Technology for Networked Reconfigurable FPGA Platforms. DATE (2002)
J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chris Wheddon, Bhusan Gupta, Yankin Tanurhan
Reconfigurable SoC - What Will it Look Like? DATE (2002)
Ivo Bolsens
Challenges and Opportunities for FPGA Platforms. FPL (2002)
Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stéphane Donnay, Marc Engels, Ivo Bolsens
Efficient bit-error-rate estimation of multicarrier transceivers. DATE (2001)
Wolfgang Eberle, Veerle Derudder, Geert Vanwijnsberghe, Mario Vergara, Luc Deneire, Liesbet Van der Perre, Marc Engels, Ivo Bolsens, Hugo De Man
80-Mb/s QPSK and 72-Mb/s 64-QAM flexible and scalable digital OFDM transceiver ASICs for wireless local area networks in the 5-GHz band. IEEE J. Solid State Circuits 36 (11) (2001)
Lode Nachtergaele, Toon Gijbels, Jan Bormans, Francky Catthoor, Ivo Bolsens
Power and Speed-Efficient Code Transformation of Video Compression Algorithms for RISC Processors. J. VLSI Signal Process. 27 (1-2) (2001)
Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stéphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens
High-level simulation of substrate noise generation from large digital circuits with multiple supplies. DATE (2001)
Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens
Hardware/software partitioning of embedded system in OCAPI-xl. CODES (2001)
Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens
A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. DAC (2000)
Marc van Heijningen, John Compiet, Piet Wambacq, Stéphane Donnay, Marc Engels, Ivo Bolsens
Analysis and experimental verification of digital substrate noise generation for epi-type substrates. IEEE J. Solid State Circuits 35 (7) (2000)
Stéphane Donnay, Philip Pieters, Kristof Vaesen, Wim Diels, Piet Wambacq, Walter De Raedt, Eric Beyne, Marc Engels, Ivo Bolsens
Chip-package codesign of a low-power 5-GHz RF front end. Proc. IEEE 88 (10) (2000)
Kristof Denolf, Peter Vos, Jan Bormans, Ivo Bolsens
Cost-Efficient C-Level Design of an MPEG-4 Video Decoder. PATMOS (2000)
Piet Wambacq, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens
Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. DATE (2000)
Marc van Heijningen, Mustafa Badaroglu, Stéphane Donnay, Marc Engels, Ivo Bolsens
High-level simulation of substrate noise generation including power supply noise coupling. DAC (2000)
Stéphane Donnay, Marc van Heijningen, Mustafa Badaroglu, Wim Diels, Marc Engels, Ivo Bolsens, Y. Zinzius, Georges G. E. Gielen, Willy Sansen, T. Fondén, Svante Signell
BANDIT: embedding analog-to-digital converters on digital telecom ASICs. ICECS (1999)
Gauthier Lafruit, Lode Nachtergaele, Jan Bormans, Marc Engels, Ivo Bolsens
Optimal memory organization for scalable texture codecs in MPEG-4. IEEE Trans. Circuits Syst. Video Technol. 9 (2) (1999)
Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Marc Engels, Ivo Bolsens
A scalable architecture for MPEG-4 embedded zero tree coding. CICC (1999)
Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens
A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. DATE (1999)
Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick
Single Chip or Hybrid System Integration. DATE (1999)
Piet Wambacq, Stéphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens
A Single-Package Solution for Wireless Transceivers. DATE (1999)
Lode Nachtergaele, Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Ivo Bolsens
Implementation of a Scalable MPEG-4 Wavelet-Based Visual Texture Compression System. DAC (1999)
Piet Wambacq, Gerd Vandersteen, Stéphane Donnay, Marc Engels, Ivo Bolsens, Erik Lauwers, Piet Vanassche, Georges G. E. Gielen
High-level simulation and power modelling of mixed-signal front-ends for digital telecommunications. ICECS (1999)
Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Lode Nachtergaele, Ivo Bolsens
A Scalable Architecture for MPEG-4 Wavelet Quantization. J. VLSI Signal Process. 23 (1) (1999)
Bart Masschelein, Bart Vanhoof, Lode Nachtergaele, Jan Bormans, Ivo Bolsens
Implementation driven selection of wavelet filters for still image coding based on bitrange expansion. MMSP (1999)
Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens
Hardware Reuse at the Behavioral Level. DAC (1999)
Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
A Programming Environment for the Design of Complex High Speed ASICs. DAC (1998)
Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens
Low Power Digital Frequency Conversion Architectures. J. VLSI Signal Process. 18 (2) (1998)
Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens
A Technique for Combined Virtual Prototyping and Hardware Design. International Workshop on Rapid System Prototyping (1998)
Ivo Bolsens, Hugo J. De Man, Bill Lin, Karl van Rompaey, Steven Vercauteren, Diederik Verkest
Hardware/software co-design of digital telecommunication systems. Proc. IEEE 85 (3) (1997)
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man
Synthesis of pipelined DSP accelerators with dynamic scheduling. IEEE Trans. Very Large Scale Integr. Syst. 5 (1) (1997)
Ivo Bolsens, Marco Cecchini
IP-based business conflicts. IEEE Des. Test Comput. 14 (2) (1997)
Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. ED&TC (1997)
Diederik Verkest, Karl van Rompaey, Ivo Bolsens, Hugo De Man
CoWare - A design environment for heterogeneous hardware/software systems. Des. Autom. Embed. Syst. 1 (4) (1996)
Karl van Rompaey, Ivo Bolsens, Hugo De Man, Diederik Verkest
CoWare - a design environment for heterogenous hardware/software systems. EURO-DAC (1996)
Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens
Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. DAC (1996)
Jan Bormans, Serge Vernalde, Jan Cornelis, Ivo Bolsens, Hugo De Man
A Hilbert fractal codec for region oriented compression of color images. ICECS (1996)
S. Samel, Bert Gyselinckx, Ivo Bolsens, Hugo De Man
Designing Systems On Silicon: A Digital Spread Spectrum Pager. VLSI Design (1996)
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man
Synthesis of pipelined DSP accelerators with dynamic scheduling. ISSS (1995)
Zohair Sahraoui, Paul Six, Ivo Bolsens, Hugo De Man
Search space reduction through clustering in test generation. EURO-DAC (1995)
Koen Van Nieuwenhove, Kjell Cools, D. Devisch, Ivo Bolsens, Serge Vernalde, Kim Chansik, R. B. W. Lee, Oh Younguk
ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec. EURO-DAC (1994)
Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catthoor
Design of heterogeneous ICs for mobile and personal communication systems. ICCAD (1994)
A. K. Betts, Ivo Bolsens, Etienne Sicard, Marc Renaudin, Adrian Johnstone
SMILE: A scalable microcontroller library element. Microprocess. Microprogramming 39 (2-5) (1993)
Karl van Rompaey, Ivo Bolsens, Hugo De Man
Just in Time Scheduling. ICCD (1992)
Evagelos Katsadas, Zohair Sahraoui, Maryse Wouters, Veerle Derudder, Ivo Bolsens, Paul Six, Hugo De Man
Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks. Synthesis for Control Dominated Circuits (1992)
Jan Vanhoof, Ivo Bolsens, Hugo De Man
Compiling Multi-Dimensional Data Streams into Distributed DSP ASIC Memory. ICCAD (1991)
W. De Rammelaere, Ivo Bolsens, Luc J. M. Claesen, Hugo De Man
Derivation of signal flow direction in MOS VLSI: an alternative. ICCD (1990)
Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man
Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour. DAC (1989)
Hugo De Man, Ivo Bolsens, E. Vanden Meersch, Johan Van Cleynenbreugel
DIALOG: An Expert Debugging System for MOSVLSI Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4 (3) (1985)