Gert Goossens

Publication Activity (10 Years)

Years Active: 1985-2015
Publications (10 Years): 0

Top Topics

Document Summarization

Technical Report

Physical Environment

Top Venues

Future Gener. Comput. Syst.

Publications

Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Werner Geurts, Gert Goossens, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini
ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces. Future Gener. Comput. Syst. 53 (2015)
Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Werner Geurts, Gert Goossens, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini
A heterogeneous many-core platform for experiments on scalable custom interconnects and management of fault and critical events, applied to many-process applications: Vol. II, 2012 technical report. CoRR (2013)
Pier Stanislao Paolucci, Iuliana Bacivarov, Gert Goossens, Rainer Leupers, Frédéric Rousseau, Christoph Schumacher, Lothar Thiele, Piero Vicini
EURETILE 2010-2012 summary: first three years of activity of the European Reference Tiled Experiment CoRR (2013)
Gert Goossens
Multi-ASIP SoCs - or how to design ultra-low power architectures for wireless and multi-media systems. SoC (2007)
Gert Goossens, Dirk Lanneer, Werner Geurts, Johan Van Praet
Design of ASIPs in multi-processor SoCs using the Chess/Checkers retargetable tool suite. SoC (2006)
Johan Van Praet, Dirk Lanneer, Werner Geurts, Gert Goossens
Processor modeling and code selection for retargetable compilation. ACM Trans. Design Autom. Electr. Syst. 6 (3) (2001)
Filip Thoen, J. Van Der Steen, Gjalt G. de Jong, Gert Goossens, Hugo De Man
Multi-thread graph: a system model for real-time embedded software synthesis. ED&TC (1997)
Ahmed Amine Jerraya, Gert Goossens
Guest Editorial Introduction to the Special Issue on the Eighth IEEE International Symposium on System Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 5 (1) (1997)
Gert Goossens, Johan Van Praet, Dirk Lanneer, Werner Geurts, Augusli Kifli, Clifford Liem, Pierre G. Paulin
Embedded software in real-time signal processing systems: design technologies. Proc. IEEE 85 (3) (1997)
Pierre G. Paulin, Clifford Liem, Marco Cornero, François Naçabal, Gert Goossens
Embedded software in real-time signal processing systems: application and architecture trends. Proc. IEEE 85 (3) (1997)
Johan Van Praet, Dirk Lanneer, Gert Goossens, Werner Geurts, Hugo De Man
A Graph Based Processor Model for Retargetable Code Generation. ED&TC (1996)
Filip Thoen, Marco Cornero, Gert Goossens, Hugo De Man
Real-time multi-tasking in software synthesis for information processing systems. ISSS (1995)
Filip Thoen, Marco Cornero, Gert Goossens, Hugo De Man
Software Synthesis for Real-Time Information Processing Systems. Workshop on Languages, Compilers, & Tools for Real-Time Systems (1995)
Gert Goossens, Dirk Lanneer, Marc Pauwels, Francis Depuydt, Koen Schoofs, Augusli Kifli, Marco Cornero, Paolo Petroni, Francky Catthoor, Hugo De Man
Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures. J. VLSI Signal Process. 9 (1-2) (1995)
Marc Pauwels, Gert Goossens, Francky Catthoor, Hugo De Man
Formalisation of multi-precision arithmetic for high-level synthesis of DSP architectures. J. VLSI Signal Process. 11 (1-2) (1995)
Francis Depuydt, Werner Geurts, Gert Goossens, Hugo De Man
Optimal Scheduling and Software Pipelining of Repetitive Signal Flow Graphs with Delay Line Optimization. EDAC-ETC-EUROASIC (1994)
Marco Cornero, Filip Thoen, Gert Goossens, Francesco Curatelli
Software Synthesis for real-time information processing systems. Code Generation for Embedded Processors (1994)
Dirk Lanneer, Marco Cornero, Gert Goossens, Hugo De Man
Data routing: a paradigm for efficient data-path synthesis and code generation. HLSS (1994)
Koen Schoofs, Gert Goossens, Hugo De Man
Bit-alignment for retargetable code generators. HLSS (1994)
Peter Vanbekbergen, Bill Lin, Gert Goossens, Hugo De Man
A generalized state assignment theory for transformations on signal transition graphs. J. VLSI Signal Process. 7 (1-2) (1994)
Johan Van Praet, Gert Goossens, Dirk Lanneer, Hugo De Man
Instruction set definition and instruction selection for ASIPs. HLSS (1994)
Francis Depuydt, Gert Goossens, Hugo De Man
Scheduling with register constraints for DSP architectures. Integr. 18 (1) (1994)
Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catthoor
Design of heterogeneous ICs for mobile and personal communication systems. ICCAD (1994)
Dirk Lanneer, Johan Van Praet, Augusli Kifli, Koen Schoofs, Werner Geurts, Filip Thoen, Gert Goossens
Chess: retargetable code generation for embedded DSP processors. Code Generation for Embedded Processors (1994)
Koen Schoofs, Gert Goossens, Hugo De Man
Signal Type Optimisation in the Design of Time-Multiplexed DSP Architectures. EDAC-ETC-EUROASIC (1994)
Peter Vanbekbergen, Bill Lin, Gert Goossens, Hugo De Man
A generalized state assignment theory for transformation on signal transition graphs. ICCAD (1992)
Augusli Kifli, R. De Wulf, J. Zegers, Gert Goossens, Paul Six, Hugo De Man
Flag/Condition Handling and Branch Assignment for Large Microcoded Controllers. Synthesis for Control Dominated Circuits (1992)
Peter Vanbekbergen, Gert Goossens, Francky Catthoor, Hugo De Man
Optimized synthesis of asynchronous control circuits from graph-theoretic specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (11) (1992)
Marc Pauwels, Dirk Lanneer, Francky Catthoor, Gert Goossens, Hugo De Man
Models for bit-true simulation and high-level synthesis of DSP applications. Great Lakes Symposium on VLSI (1992)
Stefaan Note, Francky Catthoor, Gert Goossens, Hugo De Man
Combined hardware selection and pipelining in high-performance data-path design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (4) (1992)
Francis Depuydt, Gert Goossens, Hugo De Man
Clustering Techniques for Register Optimization During Scheduling Preprocessing. ICCAD (1991)
Hugo De Man, Francky Catthoor, Gert Goossens, Jan Vanhoof, Jef L. van Meerbergen, Stefaan Note, Jos A. Huisken
Architecture-driven synthesis techniques for VLSI implementation of DSP algorithms. Proc. IEEE 78 (2) (1990)
Peter Vanbekbergen, Francky Catthoor, Gert Goossens, Hugo De Man
Optimized Synthesis of Asynchronous Control Circuits from Graph-Theoretic Specifications. ICCAD (1990)
Stefaan Note, Francky Catthoor, Gert Goossens, Hugo De Man
Combined hardware selection and pipelining in high performance data-path design. ICCD (1990)
Jef L. van Meerbergen, Jos Huisken, Paul E. R. Lippens, O. McArdle, R. Segers, Gert Goossens, Jan Vanhoof, Dirk Lanneer, Francky Catthoor, Hugo De Man
An integrated automatic design system for complex DSP algorithms. J. VLSI Signal Process. 1 (4) (1990)
Dirk Lanneer, Francky Catthoor, Gert Goossens, Marc Pauwels, Jef L. van Meerbergen, Hugo De Man
Open-ended system for high-level synthesis of flexible signal processors. EURO-DAC (1990)
Gert Goossens, Jan M. Rabaey, Joos Vandewalle, Hugo De Man
An efficient microcode compiler for application specific DSP processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (9) (1990)
Gert Goossens, Joos Vandewalle, Hugo De Man
Loop Optimization in Register-Transfer Scheduling for DSP-Systems. DAC (1989)
Francky Catthoor, Jan M. Rabaey, Gert Goossens, Jef L. van Meerbergen, Rajeev Jain, Hugo J. De Man, Joos Vandewalle
Architectural strategies for an application-specific synchronous multiprocessor environment. IEEE Trans. Acoust. Speech Signal Process. 36 (2) (1988)
Rajeev Jain, Gert Goossens, Luc J. M. Claesen, Joos Vandewalle, Hugo De Man, L. Gazsi, Alfred Fettweis
CAD Tools for the optimized design of custom VLSI wave digital filters. ICASSP (1985)