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ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces.

Roberto AmmendolaAndrea BiagioniOttorino FrezzaWerner GeurtsGert GoossensFrancesca Lo CiceroAlessandro LonardoPier Stanislao PaolucciDavide RossettiFrancesco SimulaLaura TosorattoPiero Vicini
Published in: Future Gener. Comput. Syst. (2015)
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