Harry J. M. Veendrick

Publication Activity (10 Years)

Years Active: 1990-2005
Publications (10 Years): 0

Publications

A. Katoch, Harry J. M. Veendrick, E. Seevinck
High speed current-mode signaling circuits for on-chip interconnects. ISCAS (4) (2005)
Atul Katoch, Harry J. M. Veendrick
Isodelay output driver design using step-wise charging for low power. ESSCIRC (2005)
Atul Katoch, Manish Garg, Evert Seevinck, Harry J. M. Veendrick
Adaptive threshold scheme to operate long on-chip buses at the limit of signal integrity. ESSCIRC (2004)
Rohini Krishnan, José Pineda de Gyvez, Harry J. M. Veendrick
Encoded-Low Swing Technique for Ultra Low Power Interconnect. FPL (2003)
Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick
Single Chip or Hybrid System Integration. DATE (1999)
Kees A. Vissers, Gerben Essink, Piet J. van Gerwen, P. J. M. Janssen, O. Popp, E. Riddersma, W. J. M. Smits, Harry J. M. Veendrick
Architecture and programming of two generations video signal processors. Microprocess. Microprogramming 41 (5-6) (1995)
Dick W. Harberts, Dré A. J. M. van den Elshout, Harry J. M. Veendrick
Design for routability of a high-density gate array. ICCD (1990)