Forrest Brewer

Publication Activity (10 Years)

Years Active: 1986-2021
Publications (10 Years): 13

Top Topics

Design Methodology

Pheromone Trails

Top Venues

ACM Great Lakes Symposium on VLSI

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Prashansa Mukim, Forrest Brewer
Multiwire Phase Encoding: A Signaling Strategy for High-Bandwidth, Low-Power Data Movement. IEEE Trans. Very Large Scale Integr. Syst. 29 (8) (2021)
Prashansa Mukim, Aditya Dalakoti, David McCarthy, Carrie Segal, Merritt Miller, James F. Buckwalter, Forrest Brewer
Design and Analysis of Collective Pulse Oscillators. IEEE Trans. Very Large Scale Integr. Syst. 28 (5) (2020)
Joseph Poverelli, Forrest Brewer
Direct ΣΔ Bitstream Processing for High Performance Feedback Control. CCTA (2019)
Prashansa Mukim, Aditya Dalakoti, David McCarthy, Brandon Pon, Carrie Segal, Merritt Miller, James F. Buckwalter, Forrest Brewer
Distributed Pulse Rotary Traveling Wave VCO: Architecture and Design. ISVLSI (2019)
Merritt Miller, Carrie Segal, David McCarthy, Aditya Dalakoti, Prashansa Mukim, Forrest Brewer
Impolite High Speed Interfaces with Asynchronous Pulse Logic. ACM Great Lakes Symposium on VLSI (2018)
Aditya Dalakoti, Merritt Miller, Forrest Brewer
Design and analysis of high performance pulse ring VCO. NORCAS (2017)
Merritt Miller, Aditya Dalakoti, Prashansa Mukim, Forrest Brewer
Low phase noise pulse rotary wave voltage controlled oscillator. ISOCC (2017)
Mohd. Tasleem Khan, Shaik Rafi Ahamed, Forrest Brewer
Low Complexity and Critical Path Based VLSI Architecture for LMS Adaptive Filter Using Distributed Arithmetic. VLSI Design (2017)
Aditya Dalakoti, Merritt Miller, Forrest Brewer
High performance pulse ring voltage controlled oscillator for Internet of Things. ISOCC (2017)
Aditya Dalakoti, Merritt Miller, Forrest Brewer
Pulse Ring Oscillator Tuning via Pulse Dynamics. ICCD (2017)
Aditya Dalakoti, Carrie Segal, Merritt Miller, Forrest Brewer
Asynchronous High Speed Serial Links Analysis using Integrated Charge for Event Detection. ACM Great Lakes Symposium on VLSI (2016)
Carrie Segal, Aditya Dalakoti, Merritt Miller, Forrest Brewer
Connectivity Effects on Energy and Area for Neuromorphic System with High Speed Asynchronous Pulse Mode Links. SLIP (2016)
Vishnuram Abhinav, Dheeraj Kumar Sinha, Amitabh Chatterjee, Forrest Brewer
A Novel Co-design Methodology for Optimizing ESD Protection Device Using Layout Level Approach. VLSI Design (2016)
Kunal Arya, Joseph Poverelli, Forrest Brewer
Ongoing challenges in automated cyberphysical cross-domain design. ICNC (2013)
Wei Tang, Forrest Brewer
A hierarchical Ant-Colony heuristic for architecture synthesis for on-chip communication. DASIP (2013)
Merritt Miller, Forrest Brewer
Formal verification of analog circuit parameters across variation utilizing SAT. DATE (2013)
Jian Zhen, Forrest Brewer, Volkan Rodoplu
Automated MAC Protocol Generation with Multiple Neighborhoods and Acknowledgments Based on Symbolic Monte Carlo Simulation. GLOBECOM (2011)
Michael Pellauer, Abhinav Agarwal, Asif Khan, Man Cheuk Ng, Muralidaran Vijayaraghavan, Forrest Brewer, Joel S. Emer
Design contest overview: Combined architecture for network stream categorization and intrusion detection (CANSCID). MEMOCODE (2010)
Jian Zhen, Forrest Brewer, Volkan Rodoplu
A Methodology for Optimal MAC Protocol Generation: Case Study of a Synchronous MAC Channel. GLOBECOM (2010)
Forrest Brewer, James C. Hoe
2009 MEMOCODE Co-Design Contest. MEMOCODE (2009)
Nitin Kataria, Forrest Brewer, João Pedro Hespanha, Timothy Sherwood
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems. J. Low Power Electron. 5 (3) (2009)
Nitin Kataria, Forrest Brewer, João Pedro Hespanha, Timothy Sherwood
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems. VLSI Design (2009)
Zi Yie, Nitin Kataria, Chris Burgner, Karl Åström, Forrest Brewer, Kimberly L. Turner
Control design for force balance sensors. ACC (2009)
Merritt Miller, Greg Hoover, Forrest Brewer
Pulse-mode link for robust, high speed communications. ISCAS (2008)
Greg Hoover, Forrest Brewer, Chris Gill
Latency-Insensitive Hardware/Software Interfaces. MEMOCODE (2008)
Duarte Antunes, João Pedro Hespanha, Carlos Jorge Ferreira Silvestre, Nitin Kataria, Forrest Brewer
Computationally efficient methods for digital control. CDC (2008)
Greg Hoover, Forrest Brewer
Synthesizing Synchronous Elastic Flow Networks. DATE (2008)
Rajesh Gupta, Arvind, Gérard Berry, Forrest Brewer
Advances in ESL Design. IEEE Des. Test Comput. 25 (6) (2008)
Greg Hoover, Forrest Brewer, Timothy Sherwood
Structural integrity: safety in miniature technology. SIGBED Rev. 5 (1) (2008)
Greg Hoover, Forrest Brewer, Timothy Sherwood
Towards understanding architectural tradeoffs in MEMS closed-loop feedback control. CASES (2007)
Forrest Brewer, James C. Hoe
MEMOCODE 2007 Co-Design Contest. MEMOCODE (2007)
Greg Hoover, Forrest Brewer, Timothy Sherwood
A case study of multi-threading in the embedded space. CASES (2006)
Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer, Adam Kaplan, Philip Brisk, Majid Sarrafzadeh
Layout driven data communication optimization for high level synthesis. DATE (2006)
Greg Hoover, Forrest Brewer, Timothy Sherwood
Extensible control architectures. CASES (2006)
Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Forrest Brewer
Structural search for RTL with predicate learning. DAC (2005)
Xin Hao, Forrest Brewer
Wirelength optimization by optimal block orientation. ICCAD (2005)
Aravind Vijayakumar, Forrest Brewer
Weighted control scheduling. ICCAD (2005)
Greg Hoover, Forrest Brewer
PyPBS design and methodologies. MEMOCODE (2005)
Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Forrest Brewer
RTL SAT simplification by Boolean and interval arithmetic reasoning. ICCAD (2005)
Lauren Hui Chen, Malgorzata Marek-Sadowska, Forrest Brewer
Buffer delay change in the presence of power and ground noise. IEEE Trans. Very Large Scale Integr. Syst. 11 (3) (2003)
Sandeep K. Shukla, Ramesh Karri, Seth Copen Goldstein, Forrest Brewer, Kaustav Banerjee, Sankar Basu
Nano, quantum, and molecular computing: are we ready for the validation and test challenges? HLDVT (2003)
Forrest Brewer, Steve Haynal
Symbolic NFA scheduling of a RISC microprocessor. IEEE Trans. Very Large Scale Integr. Syst. 10 (4) (2002)
Lauren Hui Chen, Malgorzata Marek-Sadowska, Forrest Brewer
Coping with buffer delay change due to power and ground noise. DAC (2002)
Steve Haynal, Forrest Brewer
Automata-Based Symbolic Scheduling for Looping DFGs. IEEE Trans. Computers 50 (3) (2001)
Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Chung-Yang Huang, Forrest Brewer
AQUILA: An Equivalence Checking System for Large Sequential Designs. IEEE Trans. Computers 49 (5) (2000)
Steve Haynal, Forrest Brewer
Representing and Scheduling Looping Behavior Symbolically. ICCD (2000)
Hien Ha, Forrest Brewer
Power and signal integrity improvement in ultra high-speed current mode logic. ISCAS (1) (1999)
Steve Haynal, Forrest Brewer
A Model for Scheduling Protocol-Constrained Components and Environments. DAC (1999)
Andrew Crews, Forrest Brewer
Shape-based sequential machine analysis. ISCAS (1) (1999)
Steve Haynal, Forrest Brewer
Efficient encoding for exact symbolic automata-based scheduling. ICCAD (1998)
Chuck Monahan, Forrest Brewer
Scheduling and binding bounds for RT-level symbolic execution. ICCAD (1997)
Tony Stornetta, Forrest Brewer
Implementation of an Efficient Parallel BDD Package. DAC (1996)
Chuck Monahan, Forrest Brewer
Concurrent Analysis Techniques for Data Path Timing Optimization. DAC (1996)
Ashok Vittal, Hein Ha, Forrest Brewer, Malgorzata Marek-Sadowska
Clock skew optimization for ground bounce control. ICCAD (1996)
Ivan P. Radivojevic, Forrest Brewer
A new symbolic technique for control-dependent scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (1) (1996)
Andrew Crews, Forrest Brewer
Controller optimization for protocol intensive applications. EURO-DAC (1996)
Ivan P. Radivojevic, Forrest Brewer
On applicability of symbolic techniques to larger scheduling problems. ED&TC (1995)
Ivan P. Radivojevic, Forrest Brewer
Symbolic Scheduling Techniques. IEICE Trans. Inf. Syst. (3) (1995)
Chuck Monahan, Forrest Brewer
Symbolic execution of data paths. Great Lakes Symposium on VLSI (1995)
Ivan P. Radivojevic, Forrest Brewer
Analysis of conditional resource sharing using a guard-based control representation. ICCD (1995)
Chuck Monahan, Forrest Brewer
Symbolic Modeling and Evaluation of Data Paths. DAC (1995)
Ivan P. Radivojevic, Forrest Brewer
Incorporating Speculative Execution in Exact Control-Dependent Scheduling. DAC (1994)
Ivan P. Radivojevic, Forrest Brewer
Ensemble representation and techniques for exact control-dependent scheduling. HLSS (1994)
Andrew Seawright, Forrest Brewer
Clairvoyant: a synthesis system for production-based specification. IEEE Trans. Very Large Scale Integr. Syst. 2 (2) (1994)
Andrew Seawright, Forrest Brewer
High-Level Symbolic Construction Technique for High Performance Sequential Synthesis. DAC (1993)
Jack Greenbaum, Forrest Brewer
Interface constrained processor specification and scheduling. Great Lakes Symposium on VLSI (1992)
Andrew Seawright, Forrest Brewer
High performance data-path synthesis via communication metrics. Great Lakes Symposium on VLSI (1992)
Andrew Seawright, Forrest Brewer
Synthesis from Production-Based Specifications. DAC (1992)
Barry M. Pangrle, Forrest Brewer, Donald A. Lobo, Andrew Seawright
Relevant Issues in High-Level Connectivity Synthesis. DAC (1991)
Mario Nemirovsky, Forrest Brewer, Roger C. Wood
DISC: Dynamic Instruction Stream Computer. MICRO (1991)
Forrest Brewer, Daniel D. Gajski
Chippe: a system for constraint driven behavioral synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (7) (1990)
Forrest Brewer, Barry M. Pangrle, Andrew Seawright
Interconnection synthesis with geometric constraints. MICRO (1990)
Forrest Brewer, Daniel Gajski
Knowledge Based Control in Micro-Architecture Design. DAC (1987)
Forrest Brewer, Daniel Gajski
An expert-system paradigm for design. DAC (1986)