Vinod K. Agarwal

Publication Activity (10 Years)

Years Active: 1977-1999
Publications (10 Years): 0

Publications

Vinod K. Agarwal
Invited Talk: Embedded Test for Systems-on-a-Chip. VLSI Design (1999)
Vinod K. Agarwal
VTS 1999 Keynote Address Embedded Test OR External Test. VTS (1999)
Krishnaiyan Thulasiraman, Anindya Das, Kaiyuan Huang, Vinod K. Agarwal
Correct diagnosis of almost all faulty units in a multiprocessor system. ISCAS (6) (1999)
Krishnaiyan Thulasiraman, Anindya Das, Kaiyuan Huang, Vinod K. Agarwal
Correct Diagnosis of Almost All Faulty Units in a Multiprocessor System. J. Circuits Syst. Comput. 8 (4) (1998)
Kaiyuan Huang, Vinod K. Agarwal, Krishnaiyan Thulasiraman
Diagnosis of clustered faults and wafer testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (2) (1998)
Vinod K. Agarwal
Embedded Test and Measurement Critical for Deep Submicron Technology. Asian Test Symposium (1997)
Vinod K. Agarwal
VTS 1994 Panel Report on BIST for Consumer Products. IEEE Des. Test Comput. 12 (1) (1995)
Koppolu Sasidhar, Abhijit Chatterjee, Vinod K. Agarwal, Joseph L. A. Hughes
Distributed Probabilistic Diagnosis of MCMs on Large Area. ITC (1995)
Oryal Tanir, Vinod K. Agarwal, P. C. P. Bhatt
A Specification-Driven Architectural Design Environment. Computer 28 (6) (1995)
D. Lambidonis, André Ivanov, Vinod K. Agarwal
Fast signature computation for BIST linear compactors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (8) (1995)
D. Lambidonis, Vinod K. Agarwal, André Ivanov, Dhiren Xavier
A quasi-optimal scheduling of intermediate signatures for multiple signature analysis compaction testing schemes. J. Electron. Test. 6 (1) (1995)
Kaiyuan Huang, Vinod K. Agarwal, Laurence E. LaForge, Krishnaiyan Thulasiraman
A Diagnosis Algorithm for Constant Degree Structures and Its Application to VLSI Circuit Testing. IEEE Trans. Parallel Distributed Syst. 6 (4) (1995)
Guoning Liao, Erik R. Altman, Vinod K. Agarwal, Guang R. Gao
A Comparative Study of Multiprocessor List Scheduling Heuristics. HICSS (1) (1994)
Morie E. Malowany, Gordon W. Roberts, Vinod K. Agarwal
VAMP: A Hierarchical Framework for Design for Manufacturability. ISCAS (1994)
Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal
Performance of Interconnection Network in Multithreaded Architectures. PARLE (1994)
Laurence E. LaForge, Kaiyuan Huang, Vinod K. Agarwal
Almost Sure Diagnosis of Almost Every Good Element. IEEE Trans. Computers 43 (3) (1994)
Anindya Das, Krishnaiyan Thulasiraman, Vinod K. Agarwal
Diagnosis of t/(t+1)-Diagnosable Systems. SIAM J. Comput. 23 (5) (1994)
Oryal Tanir, Vinod K. Agarwal, P. C. P. Bhatt
DASE: An Environment for System Level Telecommunication Design Exploration and Modelling. CAST (1994)
Robert P. Treuer, Vinod K. Agarwal
Fault Location Algorithms for Repairable Embedded. ITC (1993)
Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal
Analysis of Multithreaded Multiprocessors with Distributed Shared Memory. SPDP (1993)
Erik R. Altman, Vinod K. Agarwal, Guang R. Gao
A Novel Methodology Using Genetic Algorithms for the Design of Caches and Cache Replacement Policy. ICGA (1993)
Robert P. Treuer, Vinod K. Agarwal
Built-In Self-Diagnosis for Repairable Embedded RAMs. IEEE Des. Test Comput. 10 (2) (1993)
Anindya Das, Krishnaiyan Thulasiraman, K. B. Lakshmanan, Vinod K. Agarwal
Distributed Fault diagnosis of a Ring of Processors. Parallel Process. Lett. 3 (1993)
Oryal Tanir, Vinod K. Agarwal, P. C. P. Bhatt
The design of a library support system for a telecommunication system synthesis environment. RSP (1993)
Anindya Das, Krishnaiyan Thulasiraman, Vinod K. Agarwal, K. B. Lakshmanan
Multiprocessor Fault Diagnosis Under Local Constraints. IEEE Trans. Computers 42 (8) (1993)
Vinod K. Agarwal, André Ivanov
Computing the probability of undetected error for shortened cyclic codes. IEEE Trans. Commun. 40 (3) (1992)
Arun K. Somani, Vinod K. Agarwal
Distributed Diagnosis Algorithms for Regular Interconnected Structures. IEEE Trans. Computers 41 (7) (1992)
Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal
Performance Evaluation of Latency Tolerant Architectures. ICCI (1992)
Dhiren Xavier, Robert C. Aitken, André Ivanov, Vinod K. Agarwal
Using an asymmetric error model to study aliasing in signature analysis registers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (1) (1992)
Kaiyuan Huang, Vinod K. Agarwal, Laurence E. LaForge
Wafer Testing with Pairwise Comparisons. FTCS (1992)
Oryal Tanir, Vinod K. Agarwal, P. C. P. Bhatt
A system level synthesis framework for computer architectures. RSP (1992)
Abu S. M. Hassan, Vinod K. Agarwal, Benoit Nadeau-Dostie, Janusz Rajski
BIST of PCB interconnects using boundary-scan architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11 (10) (1992)
André Ivanov, Corot W. Starke, Vinod K. Agarwal, Wilfried Daehn, Matthias Gruetzner, Tom W. Williams
Iterative algorithms for computing aliasing probabilities. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (2) (1991)
Anindya Das, Krishnaiyan Thulasiraman, Vinod K. Agarwal
Diagnosis of T/S-Diagnosable Systems. J. Circuits Syst. Comput. 1 (4) (1991)
D. Lambidonis, André Ivanov, Vinod K. Agarwal
Fast Signature Computation for Linear Compactors. ITC (1991)
Benoit Nadeau-Dostie, Allan Silburt, Vinod K. Agarwal
Serial Interfacing for Embedded-Memory Testing. IEEE Des. Test Comput. 7 (2) (1990)
Yervant Zorian, Vinod K. Agarwal
Optimizing error masking in BIST by output data modification. J. Electron. Test. 1 (1) (1990)
Fidel Muradali, Vinod K. Agarwal, Benoit Nadeau-Dostie
A new procedure for weighted random built-in self-test. ITC (1990)
Abu S. M. Hassan, Vinod K. Agarwal, Janusz Rajski, Benoit Nadeau-Dostie
Testing of Glue Logic Interconnects Using Boundary Scan Architecture. ITC (1989)
André Ivanov, Vinod K. Agarwal
An analysis of the probabilistic behavior of linear feedback signature registers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (10) (1989)
Arun K. Somani, Vinod K. Agarwal
Distributed syndrome decoding for regular interconnected structures. FTCS (1989)
Robert C. Aitken, Vinod K. Agarwal
A diagnosis method using pseudo-random vectors without intermediate signatures. ICCAD (1989)
Anindya Das, Krishnaiyan Thulasiraman, Vinod K. Agarwal, K. B. Lakshmanan
t/s-Diagnosable Systems: A Characterization and Diagnosis Algorithm. WG (1989)
Arun K. Somani, Vinod K. Agarwal, David Avis
On the Complexity of Single Fault Set Diagnosability and Diagnosis Problems. IEEE Trans. Computers 38 (2) (1989)
Dhiren Xavier, Robert C. Aitken, André Ivanov, Vinod K. Agarwal
: Experiments on Aliasing in Signature Analysis Registers. ITC (1989)
Abu S. M. Hassan, Vinod K. Agarwal, Janusz Rajski
Testing and Diagnosis of Interconnects Using Boundary Scan Architecture. ITC (1988)
André Ivanov, Vinod K. Agarwal
An iterative technique for calculating aliasing probability of linear feedback signature registers. FTCS (1988)
Michael C. Howells, Vinod K. Agarwal
A Reconfiguration Scheme for Yield Enhancement of Large Area Binary Tree Architectures. IEEE Trans. Computers 37 (4) (1988)
André Ivanov, Vinod K. Agarwal
Dynamic testability measures for ATPG. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7 (5) (1988)
Robert C. Aitken, Vinod K. Agarwal
Aliasing probability of non-exhaustive randomized syndrome tests. ICCAD (1988)
Henry Cox, André Ivanov, Vinod K. Agarwal, Janusz Rajski
On Multiple Fault Coverage and Aliasing Probability Measures. ITC (1988)
Arun K. Somani, Vinod K. Agarwal, David Avis
A Generalized Theory for System Level Diagnosis. IEEE Trans. Computers 36 (5) (1987)
Robert P. Treuer, Vinod K. Agarwal, Hideo Fujiwara
A New Built-In Self-Test Design for PLA's with High Fault Coverage and Low Overhead. IEEE Trans. Computers 36 (3) (1987)
Janusz Rajski, Vinod K. Agarwal
Testing and Applications of Inverter-Free PLAs. IEEE Des. Test 4 (6) (1987)
Michel Dagenais, Vinod K. Agarwal, Nicholas C. Rumin
McBOOLE: A New Procedure for Exact Logic Minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5 (1) (1986)
A. S. Mahmudul Hassan, Vinod K. Agarwal
A Fault-Tolerant Modular Architecture for Binary Trees. IEEE Trans. Computers 35 (4) (1986)
Yvon Savaria, Jeremiah F. Hayes, Nicholas C. Rumin, Vinod K. Agarwal
A Theory for the Design of Soft-Error-Tolerant VLSI Circuits. IEEE J. Sel. Areas Commun. 4 (1) (1986)
André Ivanov, Vinod K. Agarwal
Testability Measures : What Do They Do for ATPG ? ITC (1986)
Vinod K. Agarwal, Janusz Rajski
Testing Properties and Applications of Inverter-Free PLA's. ITC (1985)
Michel Dagenais, Vinod K. Agarwal, Nicholas C. Rumin
The McBOOLE logic minimizer. DAC (1985)
Arun K. Somani, Vinod K. Agarwal
An Efficient Unsorted VLSI Dictionary Machine. IEEE Trans. Computers 34 (9) (1985)
Robert P. Treuer, Hideo Fujiwara, Vinod K. Agarwal
Implementing a Built-In Self-Test PLA Design. IEEE Des. Test 2 (2) (1985)
Yvon Savaria, Vinod K. Agarwal, Nicholas C. Rumin, Jeremiah F. Hayes
A Design for Machines with Built-In Tolerance to Soft Errors. ITC (1984)
Yervant Zorian, Vinod K. Agarwal
Higher Certainty of Error Coverage by Output Data Modification. ITC (1984)
Jacek Jachner, Vinod K. Agarwal
Data Flow Anomaly Detection. IEEE Trans. Software Eng. 10 (4) (1984)
Arun K. Somani, Vinod K. Agarwal
An Efficient VLSI Dictionary Machine. ISCA (1984)
Michael G. Lamoureux, Vinod K. Agarwal
Non-Stuck-At Fault Detection in nMOS Circuits by Region Analysis. ITC (1983)
Vinod K. Agarwal, Andy S. F. Fung
Multiple Fault Testing of Large Circuits by Single Fault Test Sets. IEEE Trans. Computers 30 (11) (1981)
S. S. S. P. Rao, Vinod K. Agarwal
A microprocessor based tea dryer controller. SIGSMALL (1980)
Vinod K. Agarwal
Multiple Fault Detection in Programmable Logic Arrays. IEEE Trans. Computers 29 (6) (1980)
Vinod K. Agarwal, Gerald M. Masson
Generic Fault Characterizations for Table Look-Up Coverage Bounding. IEEE Trans. Computers 29 (4) (1980)
Vinod K. Agarwal, Gerald M. Masson
Recursive Coverage Projection of Test Sets. IEEE Trans. Computers 28 (11) (1979)
Vinod K. Agarwal, Gerald M. Masson
A Functional Form Approach to Test Set Coverage in Tree Networks. IEEE Trans. Computers 28 (1) (1979)
Vinod K. Agarwal, Gerald M. Masson
Resolution-Oriented Fault Interrelationships in Combinational Logic Networks. IEEE Trans. Computers 26 (11) (1977)