Dhamin Al-Khalili

Publication Activity (10 Years)

Years Active: 1981-2023
Publications (10 Years): 5

Top Topics

Ultra Low Power

Top Venues

Int. J. Reconfigurable Comput.

J. Electron. Test.

J. Electr. Comput. Eng.

Publications

Waqas Gul, Maitham Shams, Dhamin Al-Khalili
FinFET 6T-SRAM Compute-in-Memory Targeting Low Power Neural Networks Operations. ISCAS (2023)
Roya Dibaj, Dhamin Al-Khalili, Maitham Shams
Gate Oxide Short Defect Model in FinFETs. J. Electron. Test. 34 (3) (2018)
Roya Dibaj, Dhamin Al-Khalili, Maitham Shams
Comprehensive investigation of gate oxide short in FinFETs. VTS (2017)
Shuli Gao, Dhamin Al-Khalili, J. M. Pierre Langlois, Noureddine Chabini
Decimal floating-point multiplier with binary-decimal compression based fixed-point multiplier. CCECE (2017)
Shuli Gao, Dhamin Al-Khalili, J. M. Pierre Langlois, Noureddine Chabini
Efficient Realization of BCD Multipliers Using FPGAs. Int. J. Reconfigurable Comput. 2017 (2017)
Farid Moshgelani, Dhamin Al-Khalili, Côme Rozon
Ultra-Low Leakage Arithmetic Circuits Using Symmetric and Asymmetric FinFETs. J. Electr. Comput. Eng. 2013 (2013)
Farid Moshgelani, Dhamin Al-Khalili, Côme Rozon
Ultra low leakage structures for logic circuits using symmetric and asymmetric FinFETs. NEWCAS (2012)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
An improved BCD adder using 6-LUT FPGAs. NEWCAS (2012)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini, J. M. Pierre Langlois
Asymmetric large size multipliers with optimised FPGA resource utilisation. IET Comput. Digit. Tech. 6 (6) (2012)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
Asymmetric Large Size Signed Multipliers Using Embedded Blocks in FPGAs. IPDPS Workshops (2011)
Hisham El-Masry, Dhamin Al-Khalili
Cell stack length using an enhanced logical effort model for a library-free paradigm. ICECS (2011)
Jacques Laurent Athow, Côme Rozon, Dhamin Al-Khalili, J. M. Pierre Langlois
A CNFET-based characterization framework for digital circuits. ICECS (2011)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
Asymmetric large size multiplication using embedded blocks with efficient compression technique in FPGAs. ICECS (2011)
Ali M. Farhangi, Asim J. Al-Khalili, Dhamin Al-Khalili
Pattern-Driven Clock Tree Routing with Via Minimization. ISVLSI (2010)
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois
FPGA-Based Efficient Design Approaches for Large Size Two's Complement Squarers. J. Signal Process. Syst. 58 (1) (2010)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
Two level decomposition based matrix multiplication for FPGAs. ICECS (2009)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
Efficient Scheme for Implementing Large Size Signed Multipliers Using Multigranular Embedded DSP Blocks in FPGAs. Int. J. Reconfigurable Comput. 2009 (2009)
Hussam Al-Hertani, Dhamin Al-Khalili, Côme Rozon
UDSM subthreshold leakage model for NMOS transistor stacks. Microelectron. J. 39 (12) (2008)
Man Yan Kong, J. M. Pierre Langlois, Dhamin Al-Khalili
Efficient FPGA implementation of complex multipliers using the logarithmic number system. ISCAS (2008)
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois
Optimised realisations of large integer multipliers and squarers using embedded blocks. IET Comput. Digit. Tech. 1 (1) (2007)
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois
FPGA-Based Efficient Design Approach for Large-Size Two's Complement Squarers. ASAP (2007)
J. M. Pierre Langlois, Dhamin Al-Khalili
Carry-free approximate squaring functions with O(n) complexity and O(1) delay. IEEE Trans. Circuits Syst. II Express Briefs (5) (2006)
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois
An Optimized Design Approach for Squaring Large Integers Using Embedded Hardwired Multipliers. AICCSA (2006)
Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon
Automatic generation of defect injectable VHDL fault models for ASIC standard cell libraries. Integr. 39 (4) (2006)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini, J. M. Pierre Langlois
Efficient FPGA-Based Realization of Complex Squarer and Complex Conjugate using Embedded Multipliers. SoCC (2006)
Hussam Al-Hertani, Dhamin Al-Khalili, Côme Rozon
Accurate Total Static Leakage Current Estimation in Transistor Stacks. AICCSA (2006)
Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili
Delay analysis of CMOS gates using modified logical effort model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (6) (2005)
Hussam Al-Hertani, Dhamin Al-Khalili, Côme Rozon
Leakage power dissipation in UDSM logic gates. Circuits, Signals, and Systems (2005)
Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili
Simultaneous adaptive wire adjustment and local topology modification for tuning a bounded-skew clock tree. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (10) (2005)
Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili
Clock tree tuning using shortest paths polygon. SoCC (2004)
Adnan Kabbani, Dhamin Al-Khalili, Asim J. Al-Khalili
Technology-portable analytical model for DSM CMOS inverter transition-time estimation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (9) (2003)
J. M. Pierre Langlois, Dhamin Al-Khalili
Novel approach to the design of direct digital frequency synthesizers based on linear interpolation. IEEE Trans. Circuits Syst. II Express Briefs 50 (9) (2003)
Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon
IC Bridge Fault Modeling for IP Blocks Using Neural Network-Based VHDL Saboteurs. IEEE Trans. Computers 52 (10) (2003)
J. M. Pierre Langlois, Dhamin Al-Khalili
Low power direct digital frequency synthesizers in 0.18 μm CMOS. CICC (2003)
Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili
Adaptive wire adjustment for bounded skew Clock Distribution Network. ASP-DAC (2003)
J. M. Pierre Langlois, Dhamin Al-Khalili
Hardware optimized direct digital frequency synthesizer architecture with 60 dBc spectral purity. ISCAS (5) (2002)
Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon
Fault security analysis of CMOS VLSI circuits using defect-injectable VHDL models. Integr. 32 (1-2) (2002)
Haydar Saaied, Dhamin Al-Khalili, Asim J. Al-Khalili, Mohamed Nekili
Quadratic deferred-merge embedding algorithm for zero skew clock distribution network. Timing Issues in the Specification and Synthesis of Digital Systems (2002)
J. M. Pierre Langlois, Dhamin Al-Khalili
A low power direct digital frequency synthesizer with 60 dBc spectral purity. ACM Great Lakes Symposium on VLSI (2002)
J. M. Pierre Langlois, Dhamin Al-Khalili, Robert J. Inkol
Polyphase Filter Approach for High Performance, FPGA-Based Quadrature Demodulation. J. VLSI Signal Process. 32 (3) (2002)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah
A Low Power Approach to Floating Point Adder Design for DSP Applications. J. VLSI Signal Process. 27 (3) (2001)
Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon
Accurate CMOS Bridge Fault Modeling with Neural Network-Based VHDL Saboteurs. ICCAD (2001)
Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon
Deriving accurate ASIC cell fault models for VITAL compliant VHDL simulation. ISCAS (5) (2001)
R. V. K. Pillai, S. Y. A. Shah, A. J. Al-Khalili, Dhamin Al-Khalili
Low power floating point MAFs-a comparative study. ISSPA (2001)
Saman Adham, Dhamin Al-Khalili, Côme Rozon, Douglas Racz
Comprehensive defect analysis and testability of current-mode logic circuits. ISCAS (2000)
Côme Rozon, Dhamin Al-Khalili, Saman Adham, Douglas Racz
Comparing defect coverage for current-mode logic and CMOS VLSI cells. ICECS (2000)
P. Sun, A. J. Al-Khalili, Dhamin Al-Khalili
A CAD tool for first hand CMOS circuit selection. ICECS (2000)
Joe Costello, Dhamin Al-Khalili
Behavioural synthesis of low power floating point CORDIC processors. ICECS (2000)
Michael Gallant, Dhamin Al-Khalili
Synthesis of low-power CMOS circuits using hybrid topologies. Integr. 27 (2) (1999)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
Power implications of precision limited arithmetic in floating point FIR filters. ISCAS (1) (1999)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
An IEEE Compliant Floating Point MAF. VLSI (1999)
Jason Coppens, Dhamin Al-Khalili, Côme Rozon
VHDL Modelling and Analysis of Fault Secure Systems. DATE (1998)
R. V. K. Pillai, Asim J. Al-Khalili, Dhamin Al-Khalili
A Low Power Floating Point Accumulator. VLSI Design (1998)
Dhamin Al-Khalili, Saman Adham, Côme Rozon, Moazzem Hossain, Douglas Racz
Comprehensive Defect Analysis and Defect Coverage of CMOS Circuits. DFT (1998)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
A Low Power Approach to Floating Point Adder Design. ICCD (1997)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition. ISLPED (1997)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
Energy delay analysis of partial product reduction methods for parallel multiplier implementation. ISLPED (1996)
Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri, Dhamin Al-Khalili
Design techniques for fault-tolerant systolic arrays. J. VLSI Signal Process. 11 (1-2) (1995)
T. C. Davies, Dhamin Al-Khalili, Valek Szwarc
A floating-point systolic array processing element with serial communication and built-in self-test. J. VLSI Signal Process. 8 (3) (1994)
Michael Ogbonna Esonu, Dhamin Al-Khalili, Côme Rozon
Fault Characterization and Testability Analysis of Emitter Coupled Logic and Comparison with CMOS & BiCMOS Circuits. VLSI Design 1 (4) (1994)
Michael Ogbonna Esonu, Dhamin Al-Khalili, Côme Rozon
Fault Characterization and Testability Analysis of Emitter Coupled Logic and Comparison with CMOS & BiCMOS Circuits. ISCAS (1993)
Dhamin Al-Khalili, Côme Rozon, B. Stewart
Testability analysis and fault modeling of BiCMOS circuits. J. Electron. Test. 3 (3) (1992)
Asim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili
A module generator for optimized CMOS buffers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (10) (1990)
Asim J. Al-Khalili, Yong Zhu, Dhamin Al-Khalili
A Module Generator for Optimized CMOS Buffers. DAC (1989)
Asim J. Al-Khalili, Dhamin Al-Khalili, K. Ammar
An algorithm for polygon conversion to boxes for VLSI layouts. Integr. 6 (3) (1988)
Mazin Kadhim, Dhamin Al-Khalili, Imaddin Al-Bazz
Measuring the instability of AC arc discharges. Microprocess. Microsystems 5 (6) (1981)