R. V. K. Pillai

Publication Activity (10 Years)

Years Active: 1996-2001
Publications (10 Years): 0

Publications

R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah
A Low Power Approach to Floating Point Adder Design for DSP Applications. J. VLSI Signal Process. 27 (3) (2001)
R. V. K. Pillai, S. Y. A. Shah, A. J. Al-Khalili, Dhamin Al-Khalili
Low power floating point MAFs-a comparative study. ISSPA (2001)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
Power implications of precision limited arithmetic in floating point FIR filters. ISCAS (1) (1999)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
An IEEE Compliant Floating Point MAF. VLSI (1999)
R. V. K. Pillai, Asim J. Al-Khalili, Dhamin Al-Khalili
A Low Power Floating Point Accumulator. VLSI Design (1998)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
A Low Power Approach to Floating Point Adder Design. ICCD (1997)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition. ISLPED (1997)
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili
Energy delay analysis of partial product reduction methods for parallel multiplier implementation. ISLPED (1996)