A Low Power Approach to Floating Point Adder Design.
R. V. K. PillaiDhamin Al-KhaliliAsim J. Al-KhaliliPublished in: ICCD (1997)
Keyphrases
- low power
- logic circuits
- floating point
- power dissipation
- power consumption
- single chip
- low cost
- high speed
- vlsi architecture
- low power consumption
- digital signal processing
- gate array
- cmos technology
- fixed point
- power reduction
- high power
- ultra low power
- fine grained
- nm technology
- design process
- pairwise
- bayesian networks
- real time