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A Low Power Approach to Floating Point Adder Design for DSP Applications.
R. V. K. Pillai
Dhamin Al-Khalili
Asim J. Al-Khalili
S. Y. A. Shah
Published in:
J. VLSI Signal Process. (2001)
Keyphrases
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low power
digital signal processing
floating point
logic circuits
power dissipation
low power consumption
high speed
power consumption
single chip
low cost
vlsi architecture
data flow
gate array
fixed point
vlsi circuits
wireless transmission
signal processing
design methodology
application specific
ultra low power