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Asymmetric large size multiplication using embedded blocks with efficient compression technique in FPGAs.
Shuli Gao
Dhamin Al-Khalili
Noureddine Chabini
Published in:
ICECS (2011)
Keyphrases
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efficient compression
block size
embedded systems
variable size
smart camera
bit rate
higher quality
computer vision
multiscale
computational complexity
denoising
post processing
reconstructed image
floating point
field programmable gate array