Shuli Gao

Publication Activity (10 Years)

Years Active: 2006-2017
Publications (10 Years): 4

Top Topics

Factors Affecting

Pursuit Evasion

Learning Automata

Fpga Implementation

Top Venues

IET Comput. Digit. Tech.

Int. J. Reconfigurable Comput.

Publications

Shuli Gao, Jian Zhang, Jian Song, Hui Yang, Xi Chu
Random channel generator of the integrated power line communication and visible light communication. ISPLC (2017)
Shuli Gao, Dhamin Al-Khalili, J. M. Pierre Langlois, Noureddine Chabini
Decimal floating-point multiplier with binary-decimal compression based fixed-point multiplier. CCECE (2017)
Shuli Gao, Dhamin Al-Khalili, J. M. Pierre Langlois, Noureddine Chabini
Efficient Realization of BCD Multipliers Using FPGAs. Int. J. Reconfigurable Comput. 2017 (2017)
Shuli Gao, Yanli Guo, Jianbin Chen, Lin Li
Factors affecting the performance of knowledge collaboration in virtual team based on capital appreciation. Inf. Technol. Manag. 17 (2) (2016)
Shuli Gao, Sidney N. Givigi, Alain J. G. Beaulieu
FPGA implementation of multiple Pursuit-Evasion games with decentralized Learning Automata. SysCon (2014)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
An improved BCD adder using 6-LUT FPGAs. NEWCAS (2012)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini, J. M. Pierre Langlois
Asymmetric large size multipliers with optimised FPGA resource utilisation. IET Comput. Digit. Tech. 6 (6) (2012)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
Asymmetric Large Size Signed Multipliers Using Embedded Blocks in FPGAs. IPDPS Workshops (2011)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
Asymmetric large size multiplication using embedded blocks with efficient compression technique in FPGAs. ICECS (2011)
Hui Xu, Shuli Gao, Quanwen Liu, Dun Pan, Lihua Wang, Shuzhen Ren, Min Ding, Jingwen Chen, Gang Liu
and Sybr Green I. Sensors 11 (11) (2011)
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois
FPGA-Based Efficient Design Approaches for Large Size Two's Complement Squarers. J. Signal Process. Syst. 58 (1) (2010)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
Two level decomposition based matrix multiplication for FPGAs. ICECS (2009)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini
Efficient Scheme for Implementing Large Size Signed Multipliers Using Multigranular Embedded DSP Blocks in FPGAs. Int. J. Reconfigurable Comput. 2009 (2009)
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois
Optimised realisations of large integer multipliers and squarers using embedded blocks. IET Comput. Digit. Tech. 1 (1) (2007)
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois
FPGA-Based Efficient Design Approach for Large-Size Two's Complement Squarers. ASAP (2007)
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, J. M. Pierre Langlois
An Optimized Design Approach for Squaring Large Integers Using Embedded Hardwired Multipliers. AICCSA (2006)
Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini, J. M. Pierre Langlois
Efficient FPGA-Based Realization of Complex Squarer and Complex Conjugate using Embedded Multipliers. SoCC (2006)