Login / Signup

Comparing defect coverage for current-mode logic and CMOS VLSI cells.

Côme RozonDhamin Al-KhaliliSaman AdhamDouglas Racz
Published in: ICECS (2000)
Keyphrases
  • high speed
  • chip design
  • vlsi circuits
  • delay insensitive
  • low cost
  • power consumption
  • low power
  • single chip
  • knowledge representation
  • modal logic
  • automated reasoning
  • logical framework
  • classical logic