Michele Portolan

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 26

Top Topics

Special Session

Embedded Software

Test Generation

Top Venues

Publications

Michele Portolan, Martin Keim, J. F. Coté, Hans-Martin Von Staud
What Would Interactive Testing With 1687 Look Like? ETS (2024)
Michele Portolan, Martin Keim, Jeff Rearick, Heiko Ehrenberg
Refreshing the JTAG Family. VTS (2023)
Lorena Anghel, Riccardo Cantoro, Riccardo Masante, Michele Portolan, Sandro Sartoni, Matteo Sonza Reorda
Self-Test Library Generation for In-Field Test of Path Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Riccardo Cantoro, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan
Evaluating the Impact of Aging on Path-Delay Self-Test Libraries. DFT (2023)
Michele Portolan, Antonios Pavlidis, Giorgio Di Natale, Eric Faehn, Haralampos-G. Stratigopoulos
Circuit-to-Circuit Attacks in SoCs via Trojan-Infected IEEE 1687 Test Infrastructure. ITC (2022)
Michael Laisne, Alfred L. Crouch, Michele Portolan, Martin Keim, Hans Martin von Staudt, Bradford G. Van Treuren, Jeff Rearick, Songlin Zuo
IEEE P1687.1: Extending the Network Boundaries for Test. ITC (2022)
Michele Portolan, Emanuele Valea, Paolo Maistri, Giorgio Di Natale
Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions. IEEE Des. Test 39 (3) (2022)
Hans Martin von Staudt, Bradford G. Van Treuren, Jeff Rearick, Michele Portolan, Martin Keim
Exploring and Comparing IEEE P1687.1 and IEEE 1687 Modeling of Non-TAP Interfaces. ETS (2021)
Paolo Maistri, Vincent Reynaud, Michele Portolan, Régis Leveugle
Secure Test with RSNs: Seamless Authenticated Extended Confidentiality. NEWCAS (2021)
Michele Portolan, Vincent Reynaud, Paolo Maistri, Régis Leveugle, Giorgio Di Natale
Security EDA Extension through P1687.1 and 1687 Callbacks. ITC (2021)
Michele Portolan, Jeff Rearick, Martin Keim
Linking Chip, Board, and System Test via Standards. ETS (2020)
Mike Laisne, Alfred L. Crouch, Michele Portolan, Martin Keim, Hans Martin von Staudt, M. Abdalwahab, Bradford G. Van Treuren, Jeff Rearick
Modeling Novel Non-JTAG IEEE 1687-Like Architectures. ITC (2020)
Michele Portolan
Automated Testing Flow: The Present and the Future. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Michele Portolan, R. Silveira Feitoza, Ghislain Takam Tchendjou, Vincent Reynaud, Kalpana Senthamarai Kannan, Manuel Barragán, Emmanuel Simeu, Paolo Maistri, Lorena Anghel, Régis Leveugle, Salvador Mir
A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System. IOLTS (2020)
Riccardo Cantoro, Dario Foti, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan
New Perspectives on Core In-field Path Delay Test. ITC (2020)
Michele Portolan, Vincent Reynaud, Paolo Maistri, Régis Leveugle
Dynamic Authentication-Based Secure Access to Test Infrastructure. ETS (2020)
Alessandro Savino, Michele Portolan, Régis Leveugle, Stefano Di Carlo
Approximate computing design exploration through data lifetime metrics. ETS (2019)
Michele Portolan, Alessandro Savino, Régis Leveugle, Stefano Di Carlo, Alberto Bosio, Giorgio Di Natale
Alternatives to Fault Injections for Early Safety/Security Evaluations. ETS (2019)
Aleksa Damljanovic, Artur Jutman, Michele Portolan, Ernesto Sánchez, Giovanni Squillero, Anton Tsertov
Simulation-based Equivalence Checking between IEEE 1687 ICL and RTL. ITC (2019)
Michele Portolan, Riccardo Cantoro, Ernesto Sánchez
A Functional Approach to Test and Debug of IEEE 1687 Reconfigurable Networks. ETS (2019)
Giorgio Di Natale, Maha Kooli, Alberto Bosio, Michele Portolan, Régis Leveugle
Reliability of computing systems: From flip flops to variables. IOLTS (2017)
Michele Portolan, Manuel J. Barragan, Rshdee Alhakim, Salvador Mir
Mixed-signal BIST computation offloading using IEEE 1687. ETS (2017)
K. Chibani, Michele Portolan, Régis Leveugle
Evaluating application-aware soft error effects in digital circuits without fault injections or probabilistic computations. IOLTS (2016)
Michele Portolan
A novel test generation and application flow for functional access to IEEE 1687 instruments. ETS (2016)
Michele Portolan
Accessing 1687 systems using arbitrary protocols. ITC (2016)
Michele Portolan, Robin Rolland
Student-driven development of a digital tester. EWME (2016)
Michele Portolan, K. Huang
Special session 8C: E.J. McCluskey doctoral thesis award semi-final. VTS (2015)
K. Chibani, Mohamed Ben Jrad, Michele Portolan, Régis Leveugle
Fast accurate evaluation of register lifetime and criticality in a pipelined microprocessor. VLSI-SoC (2014)
K. Chibani, Salma Bergaoui, Michele Portolan, Régis Leveugle
Criticality evaluation of embedded software running on a pipelined microprocessor and impact of compilation options. ICECS (2014)
Michele Portolan, Michail Maniatakos
Special session 8A: E.J. McCluskey Doctoral Thesis Award semi-final. VTS (2014)
Davide Cherubini, Michele Portolan
Automatic equivalent model generation and evolution for small cell networks. WiOpt (2013)
Michele Portolan, Michail Maniatakos
Special session 8A: E.J. McCluskey doctoral thesis award semi-final - presentations. VTS (2013)
Michele Portolan, Michail Maniatakos
Special session 3B: E.J. McCluskey Doctoral Thesis Award semi-final - Posters. VTS (2013)
Michele Portolan, Bradford G. Van Treuren, Suresh Goyal
Executing IJTAG: Are Vectors Enough? IEEE Des. Test 30 (5) (2013)
Michele Portolan
Packet-based JTAG for remote testing. ITC (2012)
Michele Portolan, Suresh Goyal, Bradford G. Van Treuren, Chen-Huan Chiang, Tapan J. Chakraborty, Thomas B. Cook
A Common Language Framework for Next-Generation Embedded Testing. IEEE Des. Test Comput. 27 (5) (2010)
Michele Portolan, Bradford G. Van Treuren, Suresh Goyal
Scan chain securization though Open-Circuit Deadlocks. ITC (2010)
Michele Portolan, Suresh Goyal, Bradford G. Van Treuren
Scalable and efficient integrated test architecture. ITC (2009)
Michele Portolan, Suresh Goyal, Bradford G. Van Treuren, Chen-Huan Chiang, Tapan J. Chakraborty, Thomas B. Cook
A New Language Approach for IJTAG. ITC (2008)
Pierre Vanhauwaert, Michele Portolan, Régis Leveugle, Philippe Roche
Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based system. ICECS (2008)
Michele Portolan, Régis Leveugle
Effective Checkpoint and Rollback Using Hardware/OS Collaboration. DFT (2007)
Michele Portolan, Régis Leveugle
On the Need for Common Evaluation Methods for Fault Tolerance Costs in Microprocessors. IOLTS (2005)
Michele Portolan, Régis Leveugle
Towards a Secure and Reliable System. EUC (2005)
Michele Portolan, Régis Leveugle
Operating System Function Reuse to Achieve Low-Cost Fault Tolerance. IOLTS (2004)