Michael Laisne

Publication Activity (10 Years)

Years Active: 2007-2022
Publications (10 Years): 4

Top Topics

Semiconductor Devices

Widely Accepted

Top Venues

Publications

Michael Laisne, Alfred L. Crouch, Michele Portolan, Martin Keim, Hans Martin von Staudt, Bradford G. Van Treuren, Jeff Rearick, Songlin Zuo
IEEE P1687.1: Extending the Network Boundaries for Test. ITC (2022)
Hans Martin von Staudt, Mohamed Anas Benhebibi, Jeff Rearick, Michael Laisne
Industrial Application of IJTAG Standards to the Test of Big-A/little-d devices. ITC (2020)
Michael Laisne, Hans Martin von Staudt, Sourabh Bhalerao, Mark Eason
Single-pin test control for Big A, little D devices. ITC (2017)
Al Crouch, Michael Laisne, Martin Keim
Generalizing Access to Instrumentation Embedded in a Semiconductor Device. Computer 50 (7) (2017)
Dragoljub Gagi Drmanac, Michael Laisne
Wafer probe test cost reduction of an RF/A device by automatic testset minimization - A case study. ITC (2011)
Michael Laisne, Triphuong Nguyen, Song-lin Zuo, Xiangdong Pan, Hailong Cui, Cher Bai, A. Street, M. Parley, Neetu Agrawal, K. Sundararaman
Verification and debugging of IDDQ test of low power chips. ITC (2007)
Rajsekhar Adapa, Edward Flanigan, Spyros Tragoudas, Michael Laisne, Hailong Cui, Tsvetomir Petrov
Function-Based Test Generation for (Non-Robust) Path Delay Faults Using the Launch-off-Capture Scan Architecture. ISQED (2007)
Edward Flanigan, Rajsekhar Adapa, Hailong Cui, Michael Laisne, Spyros Tragoudas, Tsvetomir Petrov
Function-based ATPG for Path Delay Faults using the Launch-Off-Capture Scan Architecture. VLSI Design (2007)